1 /*
2  * Copyright 2007 Freescale Semiconductor.
3  *
4  * See file CREDITS for list of people who contributed to this
5  * project.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20  * MA 02111-1307 USA
21  */
22 
23 #include <common.h>
24 #include <asm/io.h>
25 
26 #include "bcsr.h"
27 
28 void enable_8568mds_duart()
29 {
30 	volatile uint* duart_mux	= (uint *)(CONFIG_SYS_CCSRBAR + 0xe0060);
31 	volatile uint* devices		= (uint *)(CONFIG_SYS_CCSRBAR + 0xe0070);
32 	volatile u8 *bcsr		= (u8 *)(CONFIG_SYS_BCSR);
33 
34 	*duart_mux = 0x80000000;	/* Set the mux to Duart on PMUXCR */
35 	*devices  = 0;			/* Enable all peripheral devices */
36 	bcsr[5] |= 0x01;		/* Enable Duart in BCSR*/
37 }
38 
39 void enable_8568mds_flash_write()
40 {
41 	volatile u8 *bcsr = (u8 *)(CONFIG_SYS_BCSR);
42 
43 	bcsr[9] |= 0x01;
44 }
45 
46 void disable_8568mds_flash_write()
47 {
48 	volatile u8 *bcsr = (u8 *)(CONFIG_SYS_BCSR);
49 
50 	bcsr[9] &= ~(0x01);
51 }
52 
53 void enable_8568mds_qe_mdio()
54 {
55 	u8 *bcsr = (u8 *)(CONFIG_SYS_BCSR);
56 
57 	bcsr[7] |= 0x01;
58 }
59 
60 #if defined(CONFIG_UEC_ETH1) || defined(CONFIG_UEC_ETH2)
61 void reset_8568mds_uccs(void)
62 {
63 	volatile u8 *bcsr = (u8 *)(CONFIG_SYS_BCSR);
64 
65 	/* Turn off UCC1 & UCC2 */
66 	out_8(&bcsr[8], in_8(&bcsr[8]) & ~BCSR_UCC1_GETH_EN);
67 	out_8(&bcsr[9], in_8(&bcsr[9]) & ~BCSR_UCC2_GETH_EN);
68 
69 	/* Mode is RGMII, all bits clear */
70 	out_8(&bcsr[11], in_8(&bcsr[11]) & ~(BCSR_UCC1_MODE_MSK |
71 					     BCSR_UCC2_MODE_MSK));
72 
73 	/* Turn UCC1 & UCC2 on */
74 	out_8(&bcsr[8], in_8(&bcsr[8]) | BCSR_UCC1_GETH_EN);
75 	out_8(&bcsr[9], in_8(&bcsr[9]) | BCSR_UCC2_GETH_EN);
76 }
77 #endif
78