1 /* 2 * Copyright 2007 Freescale Semiconductor, Inc. 3 * 4 * See file CREDITS for list of people who contributed to this 5 * project. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * MA 02111-1307 USA 21 */ 22 23 #include <common.h> 24 #include <command.h> 25 #include <asm/processor.h> 26 #include <asm/immap_85xx.h> 27 #include <spd.h> 28 #include <miiphy.h> 29 30 #include "../common/pixis.h" 31 32 #if defined(CONFIG_OF_FLAT_TREE) 33 #include <ft_build.h> 34 extern void ft_cpu_setup(void *blob, bd_t *bd); 35 #endif 36 37 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) 38 extern void ddr_enable_ecc(unsigned int dram_size); 39 #endif 40 41 extern long int spd_sdram(void); 42 43 void sdram_init(void); 44 45 int board_early_init_f (void) 46 { 47 return 0; 48 } 49 50 int checkboard (void) 51 { 52 volatile immap_t *immap = (immap_t *) CFG_CCSRBAR; 53 volatile ccsr_gur_t *gur = &immap->im_gur; 54 55 if ((uint)&gur->porpllsr != 0xe00e0000) { 56 printf("immap size error %x\n",&gur->porpllsr); 57 } 58 printf ("Board: MPC8544DS\n"); 59 60 return 0; 61 } 62 63 long int 64 initdram(int board_type) 65 { 66 long dram_size = 0; 67 68 puts("Initializing\n"); 69 70 dram_size = spd_sdram(); 71 72 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) 73 /* 74 * Initialize and enable DDR ECC. 75 */ 76 ddr_enable_ecc(dram_size); 77 #endif 78 puts(" DDR: "); 79 return dram_size; 80 } 81 82 #if defined(CFG_DRAM_TEST) 83 int 84 testdram(void) 85 { 86 uint *pstart = (uint *) CFG_MEMTEST_START; 87 uint *pend = (uint *) CFG_MEMTEST_END; 88 uint *p; 89 90 printf("Testing DRAM from 0x%08x to 0x%08x\n", 91 CFG_MEMTEST_START, 92 CFG_MEMTEST_END); 93 94 printf("DRAM test phase 1:\n"); 95 for (p = pstart; p < pend; p++) 96 *p = 0xaaaaaaaa; 97 98 for (p = pstart; p < pend; p++) { 99 if (*p != 0xaaaaaaaa) { 100 printf ("DRAM test fails at: %08x\n", (uint) p); 101 return 1; 102 } 103 } 104 105 printf("DRAM test phase 2:\n"); 106 for (p = pstart; p < pend; p++) 107 *p = 0x55555555; 108 109 for (p = pstart; p < pend; p++) { 110 if (*p != 0x55555555) { 111 printf ("DRAM test fails at: %08x\n", (uint) p); 112 return 1; 113 } 114 } 115 116 printf("DRAM test passed.\n"); 117 return 0; 118 } 119 #endif 120 121 int last_stage_init(void) 122 { 123 return 0; 124 } 125 126 127 unsigned long 128 get_board_sys_clk(ulong dummy) 129 { 130 u8 i, go_bit, rd_clks; 131 ulong val = 0; 132 133 go_bit = in8(PIXIS_BASE + PIXIS_VCTL); 134 go_bit &= 0x01; 135 136 rd_clks = in8(PIXIS_BASE + PIXIS_VCFGEN0); 137 rd_clks &= 0x1C; 138 139 /* 140 * Only if both go bit and the SCLK bit in VCFGEN0 are set 141 * should we be using the AUX register. Remember, we also set the 142 * GO bit to boot from the alternate bank on the on-board flash 143 */ 144 145 if (go_bit) { 146 if (rd_clks == 0x1c) 147 i = in8(PIXIS_BASE + PIXIS_AUX); 148 else 149 i = in8(PIXIS_BASE + PIXIS_SPD); 150 } else { 151 i = in8(PIXIS_BASE + PIXIS_SPD); 152 } 153 154 i &= 0x07; 155 156 switch (i) { 157 case 0: 158 val = 33333333; 159 break; 160 case 1: 161 val = 40000000; 162 break; 163 case 2: 164 val = 50000000; 165 break; 166 case 3: 167 val = 66666666; 168 break; 169 case 4: 170 val = 83000000; 171 break; 172 case 5: 173 val = 100000000; 174 break; 175 case 6: 176 val = 133333333; 177 break; 178 case 7: 179 val = 166666666; 180 break; 181 } 182 183 return val; 184 } 185 186 #if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) 187 void 188 ft_board_setup(void *blob, bd_t *bd) 189 { 190 u32 *p; 191 int len; 192 193 ft_cpu_setup(blob, bd); 194 195 p = ft_get_prop(blob, "/memory/reg", &len); 196 if (p != NULL) { 197 *p++ = cpu_to_be32(bd->bi_memstart); 198 *p = cpu_to_be32(bd->bi_memsize); 199 } 200 } 201 #endif 202