14bcae9c9SKumar Gala /* 24bcae9c9SKumar Gala * Copyright 2008 Freescale Semiconductor, Inc. 34bcae9c9SKumar Gala * 44bcae9c9SKumar Gala * (C) Copyright 2000 54bcae9c9SKumar Gala * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 64bcae9c9SKumar Gala * 74bcae9c9SKumar Gala * See file CREDITS for list of people who contributed to this 84bcae9c9SKumar Gala * project. 94bcae9c9SKumar Gala * 104bcae9c9SKumar Gala * This program is free software; you can redistribute it and/or 114bcae9c9SKumar Gala * modify it under the terms of the GNU General Public License as 124bcae9c9SKumar Gala * published by the Free Software Foundation; either version 2 of 134bcae9c9SKumar Gala * the License, or (at your option) any later version. 144bcae9c9SKumar Gala * 154bcae9c9SKumar Gala * This program is distributed in the hope that it will be useful, 164bcae9c9SKumar Gala * but WITHOUT ANY WARRANTY; without even the implied warranty of 174bcae9c9SKumar Gala * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 184bcae9c9SKumar Gala * GNU General Public License for more details. 194bcae9c9SKumar Gala * 204bcae9c9SKumar Gala * You should have received a copy of the GNU General Public License 214bcae9c9SKumar Gala * along with this program; if not, write to the Free Software 224bcae9c9SKumar Gala * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 234bcae9c9SKumar Gala * MA 02111-1307 USA 244bcae9c9SKumar Gala */ 254bcae9c9SKumar Gala 264bcae9c9SKumar Gala #include <common.h> 274bcae9c9SKumar Gala #include <asm/fsl_law.h> 284bcae9c9SKumar Gala #include <asm/mmu.h> 294bcae9c9SKumar Gala 304bcae9c9SKumar Gala struct law_entry law_table[] = { 31*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), 32*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI), 33*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD SET_LAW(CONFIG_SYS_LBC_NONCACHE_BASE, LAWAR_SIZE_128M, LAW_TRGT_IF_LBC), 34*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAWAR_SIZE_256M, LAW_TRGT_IF_PCIE_1), 35*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_1), 36*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAWAR_SIZE_512M, LAW_TRGT_IF_PCIE_2), 37*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_2), 384bcae9c9SKumar Gala /* contains both PCIE3 MEM & IO space */ 39*6d0f6bcfSJean-Christophe PLAGNIOL-VILLARD SET_LAW(CONFIG_SYS_PCIE3_MEM_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_PCIE_3), 404bcae9c9SKumar Gala }; 414bcae9c9SKumar Gala 424bcae9c9SKumar Gala int num_law_entries = ARRAY_SIZE(law_table); 43