1*4bcae9c9SKumar Gala /* 2*4bcae9c9SKumar Gala * Copyright 2008 Freescale Semiconductor, Inc. 3*4bcae9c9SKumar Gala * 4*4bcae9c9SKumar Gala * (C) Copyright 2000 5*4bcae9c9SKumar Gala * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 6*4bcae9c9SKumar Gala * 7*4bcae9c9SKumar Gala * See file CREDITS for list of people who contributed to this 8*4bcae9c9SKumar Gala * project. 9*4bcae9c9SKumar Gala * 10*4bcae9c9SKumar Gala * This program is free software; you can redistribute it and/or 11*4bcae9c9SKumar Gala * modify it under the terms of the GNU General Public License as 12*4bcae9c9SKumar Gala * published by the Free Software Foundation; either version 2 of 13*4bcae9c9SKumar Gala * the License, or (at your option) any later version. 14*4bcae9c9SKumar Gala * 15*4bcae9c9SKumar Gala * This program is distributed in the hope that it will be useful, 16*4bcae9c9SKumar Gala * but WITHOUT ANY WARRANTY; without even the implied warranty of 17*4bcae9c9SKumar Gala * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18*4bcae9c9SKumar Gala * GNU General Public License for more details. 19*4bcae9c9SKumar Gala * 20*4bcae9c9SKumar Gala * You should have received a copy of the GNU General Public License 21*4bcae9c9SKumar Gala * along with this program; if not, write to the Free Software 22*4bcae9c9SKumar Gala * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23*4bcae9c9SKumar Gala * MA 02111-1307 USA 24*4bcae9c9SKumar Gala */ 25*4bcae9c9SKumar Gala 26*4bcae9c9SKumar Gala #include <common.h> 27*4bcae9c9SKumar Gala #include <asm/fsl_law.h> 28*4bcae9c9SKumar Gala #include <asm/mmu.h> 29*4bcae9c9SKumar Gala 30*4bcae9c9SKumar Gala struct law_entry law_table[] = { 31*4bcae9c9SKumar Gala SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), 32*4bcae9c9SKumar Gala SET_LAW_ENTRY(3, CFG_PCI1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI), 33*4bcae9c9SKumar Gala SET_LAW_ENTRY(4, CFG_LBC_CACHE_BASE, LAWAR_SIZE_256M, LAW_TRGT_IF_LBC), 34*4bcae9c9SKumar Gala SET_LAW_ENTRY(5, CFG_PCIE1_MEM_PHYS, LAWAR_SIZE_256M, LAW_TRGT_IF_PCIE_1), 35*4bcae9c9SKumar Gala SET_LAW_ENTRY(6, CFG_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_1), 36*4bcae9c9SKumar Gala SET_LAW_ENTRY(7, CFG_PCIE2_MEM_PHYS, LAWAR_SIZE_512M, LAW_TRGT_IF_PCIE_2), 37*4bcae9c9SKumar Gala SET_LAW_ENTRY(8, CFG_PCIE2_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_2), 38*4bcae9c9SKumar Gala /* contains both PCIE3 MEM & IO space */ 39*4bcae9c9SKumar Gala SET_LAW_ENTRY(9, CFG_PCIE3_MEM_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_PCIE_3), 40*4bcae9c9SKumar Gala }; 41*4bcae9c9SKumar Gala 42*4bcae9c9SKumar Gala int num_law_entries = ARRAY_SIZE(law_table); 43