1 /*
2  * Copyright (C) 2007 Freescale Semiconductor, Inc.
3  *
4  * Author: Scott Wood <scottwood@freescale.com>
5  *         Dave Liu <daveliu@freescale.com>
6  *
7  * See file CREDITS for list of people who contributed to this
8  * project.
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License as
12  * published by the Free Software Foundation; either version 2 of
13  * the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23  * MA 02111-1307 USA
24  */
25 
26 #include <common.h>
27 #include <i2c.h>
28 #if defined(CONFIG_OF_LIBFDT)
29 #include <libfdt.h>
30 #endif
31 #include <pci.h>
32 #include <mpc83xx.h>
33 
34 DECLARE_GLOBAL_DATA_PTR;
35 
36 int board_early_init_f(void)
37 {
38 	volatile immap_t *im = (immap_t *)CFG_IMMR;
39 
40 	if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)
41 		gd->flags |= GD_FLG_SILENT;
42 
43 	return 0;
44 }
45 
46 static u8 read_board_info(void)
47 {
48 	u8 val8;
49 	i2c_set_bus_num(0);
50 
51 	if (i2c_read(CFG_I2C_PCF8574A_ADDR, 0, 0, &val8, 1) == 0)
52 		return val8;
53 	else
54 		return 0;
55 }
56 
57 int checkboard(void)
58 {
59 	static const char * const rev_str[] = {
60 		"0.0",
61 		"0.1",
62 		"1.0",
63 		"1.1",
64 		"<unknown>",
65 	};
66 	u8 info;
67 	int i;
68 
69 	info = read_board_info();
70 	i = (!info) ? 4: info & 0x03;
71 
72 	printf("Board: Freescale MPC8315ERDB Rev %s\n", rev_str[i]);
73 
74 	return 0;
75 }
76 
77 static struct pci_region pci_regions[] = {
78 	{
79 		bus_start: CFG_PCI_MEM_BASE,
80 		phys_start: CFG_PCI_MEM_PHYS,
81 		size: CFG_PCI_MEM_SIZE,
82 		flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
83 	},
84 	{
85 		bus_start: CFG_PCI_MMIO_BASE,
86 		phys_start: CFG_PCI_MMIO_PHYS,
87 		size: CFG_PCI_MMIO_SIZE,
88 		flags: PCI_REGION_MEM
89 	},
90 	{
91 		bus_start: CFG_PCI_IO_BASE,
92 		phys_start: CFG_PCI_IO_PHYS,
93 		size: CFG_PCI_IO_SIZE,
94 		flags: PCI_REGION_IO
95 	}
96 };
97 
98 void pci_init_board(void)
99 {
100 	volatile immap_t *immr = (volatile immap_t *)CFG_IMMR;
101 	volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
102 	volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
103 	struct pci_region *reg[] = { pci_regions };
104 	int warmboot;
105 
106 	/* Enable all 3 PCI_CLK_OUTPUTs. */
107 	clk->occr |= 0xe0000000;
108 
109 	/*
110 	 * Configure PCI Local Access Windows
111 	 */
112 	pci_law[0].bar = CFG_PCI_MEM_PHYS & LAWBAR_BAR;
113 	pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB;
114 
115 	pci_law[1].bar = CFG_PCI_IO_PHYS & LAWBAR_BAR;
116 	pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
117 
118 	warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM;
119 	warmboot |= immr->pmc.pmccr1 & PMCCR1_POWER_OFF;
120 
121 	mpc83xx_pci_init(1, reg, warmboot);
122 }
123 
124 #if defined(CONFIG_OF_BOARD_SETUP)
125 void ft_board_setup(void *blob, bd_t *bd)
126 {
127 	ft_cpu_setup(blob, bd);
128 #ifdef CONFIG_PCI
129 	ft_pci_setup(blob, bd);
130 #endif
131 }
132 #endif
133