1 /* 2 * Copyright (C) Freescale Semiconductor, Inc. 2006-2007 3 * 4 * Author: Scott Wood <scottwood@freescale.com> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #include <common.h> 26 #if defined(CONFIG_OF_LIBFDT) 27 #include <libfdt.h> 28 #endif 29 #include <pci.h> 30 #include <mpc83xx.h> 31 #include <vsc7385.h> 32 #include <ns16550.h> 33 #include <nand.h> 34 #if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD) 35 #include <asm/gpio.h> 36 #endif 37 38 DECLARE_GLOBAL_DATA_PTR; 39 40 int board_early_init_f(void) 41 { 42 #ifndef CONFIG_SYS_8313ERDB_BROKEN_PMC 43 volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; 44 45 if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) 46 gd->flags |= GD_FLG_SILENT; 47 #endif 48 #if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD) 49 mpc83xx_gpio_init_f(); 50 #endif 51 52 return 0; 53 } 54 55 int board_early_init_r(void) 56 { 57 #if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD) 58 mpc83xx_gpio_init_r(); 59 #endif 60 61 return 0; 62 } 63 64 int checkboard(void) 65 { 66 puts("Board: Freescale MPC8313ERDB\n"); 67 return 0; 68 } 69 70 #ifndef CONFIG_SPL_BUILD 71 static struct pci_region pci_regions[] = { 72 { 73 .bus_start = CONFIG_SYS_PCI1_MEM_BASE, 74 .phys_start = CONFIG_SYS_PCI1_MEM_PHYS, 75 .size = CONFIG_SYS_PCI1_MEM_SIZE, 76 .flags = PCI_REGION_MEM | PCI_REGION_PREFETCH 77 }, 78 { 79 .bus_start = CONFIG_SYS_PCI1_MMIO_BASE, 80 .phys_start = CONFIG_SYS_PCI1_MMIO_PHYS, 81 .size = CONFIG_SYS_PCI1_MMIO_SIZE, 82 .flags = PCI_REGION_MEM 83 }, 84 { 85 .bus_start = CONFIG_SYS_PCI1_IO_BASE, 86 .phys_start = CONFIG_SYS_PCI1_IO_PHYS, 87 .size = CONFIG_SYS_PCI1_IO_SIZE, 88 .flags = PCI_REGION_IO 89 } 90 }; 91 92 void pci_init_board(void) 93 { 94 volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR; 95 volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; 96 volatile law83xx_t *pci_law = immr->sysconf.pcilaw; 97 struct pci_region *reg[] = { pci_regions }; 98 99 /* Enable all 3 PCI_CLK_OUTPUTs. */ 100 clk->occr |= 0xe0000000; 101 102 /* 103 * Configure PCI Local Access Windows 104 */ 105 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; 106 pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB; 107 108 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; 109 pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB; 110 111 mpc83xx_pci_init(1, reg); 112 } 113 114 /* 115 * Miscellaneous late-boot configurations 116 * 117 * If a VSC7385 microcode image is present, then upload it. 118 */ 119 int misc_init_r(void) 120 { 121 int rc = 0; 122 123 #ifdef CONFIG_VSC7385_IMAGE 124 if (vsc7385_upload_firmware((void *) CONFIG_VSC7385_IMAGE, 125 CONFIG_VSC7385_IMAGE_SIZE)) { 126 puts("Failure uploading VSC7385 microcode.\n"); 127 rc = 1; 128 } 129 #endif 130 131 return rc; 132 } 133 134 #if defined(CONFIG_OF_BOARD_SETUP) 135 void ft_board_setup(void *blob, bd_t *bd) 136 { 137 ft_cpu_setup(blob, bd); 138 #ifdef CONFIG_PCI 139 ft_pci_setup(blob, bd); 140 #endif 141 } 142 #endif 143 #else /* CONFIG_SPL_BUILD */ 144 void board_init_f(ulong bootflag) 145 { 146 board_early_init_f(); 147 NS16550_init((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), 148 CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE); 149 puts("NAND boot... "); 150 init_timebase(); 151 initdram(0); 152 relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, (gd_t *)gd, 153 CONFIG_SYS_NAND_U_BOOT_RELOC); 154 } 155 156 void board_init_r(gd_t *gd, ulong dest_addr) 157 { 158 nand_boot(); 159 } 160 161 void putc(char c) 162 { 163 if (gd->flags & GD_FLG_SILENT) 164 return; 165 166 if (c == '\n') 167 NS16550_putc((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), '\r'); 168 169 NS16550_putc((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), c); 170 } 171 #endif 172