1 /* 2 * Copyright (C) Freescale Semiconductor, Inc. 2006-2007 3 * 4 * Author: Scott Wood <scottwood@freescale.com> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #include <common.h> 26 #if defined(CONFIG_OF_LIBFDT) 27 #include <libfdt.h> 28 #endif 29 #include <pci.h> 30 #include <mpc83xx.h> 31 #include <vsc7385.h> 32 #include <ns16550.h> 33 #include <nand.h> 34 35 DECLARE_GLOBAL_DATA_PTR; 36 37 int board_early_init_f(void) 38 { 39 #ifndef CONFIG_SYS_8313ERDB_BROKEN_PMC 40 volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; 41 42 if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) 43 gd->flags |= GD_FLG_SILENT; 44 #endif 45 46 return 0; 47 } 48 49 int checkboard(void) 50 { 51 puts("Board: Freescale MPC8313ERDB\n"); 52 return 0; 53 } 54 55 #ifndef CONFIG_NAND_SPL 56 static struct pci_region pci_regions[] = { 57 { 58 bus_start: CONFIG_SYS_PCI1_MEM_BASE, 59 phys_start: CONFIG_SYS_PCI1_MEM_PHYS, 60 size: CONFIG_SYS_PCI1_MEM_SIZE, 61 flags: PCI_REGION_MEM | PCI_REGION_PREFETCH 62 }, 63 { 64 bus_start: CONFIG_SYS_PCI1_MMIO_BASE, 65 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS, 66 size: CONFIG_SYS_PCI1_MMIO_SIZE, 67 flags: PCI_REGION_MEM 68 }, 69 { 70 bus_start: CONFIG_SYS_PCI1_IO_BASE, 71 phys_start: CONFIG_SYS_PCI1_IO_PHYS, 72 size: CONFIG_SYS_PCI1_IO_SIZE, 73 flags: PCI_REGION_IO 74 } 75 }; 76 77 void pci_init_board(void) 78 { 79 volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR; 80 volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; 81 volatile law83xx_t *pci_law = immr->sysconf.pcilaw; 82 struct pci_region *reg[] = { pci_regions }; 83 84 /* Enable all 3 PCI_CLK_OUTPUTs. */ 85 clk->occr |= 0xe0000000; 86 87 /* 88 * Configure PCI Local Access Windows 89 */ 90 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; 91 pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB; 92 93 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; 94 pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB; 95 96 mpc83xx_pci_init(1, reg); 97 } 98 99 /* 100 * Miscellaneous late-boot configurations 101 * 102 * If a VSC7385 microcode image is present, then upload it. 103 */ 104 int misc_init_r(void) 105 { 106 int rc = 0; 107 108 #ifdef CONFIG_VSC7385_IMAGE 109 if (vsc7385_upload_firmware((void *) CONFIG_VSC7385_IMAGE, 110 CONFIG_VSC7385_IMAGE_SIZE)) { 111 puts("Failure uploading VSC7385 microcode.\n"); 112 rc = 1; 113 } 114 #endif 115 116 return rc; 117 } 118 119 #if defined(CONFIG_OF_BOARD_SETUP) 120 void ft_board_setup(void *blob, bd_t *bd) 121 { 122 ft_cpu_setup(blob, bd); 123 #ifdef CONFIG_PCI 124 ft_pci_setup(blob, bd); 125 #endif 126 } 127 #endif 128 #else /* CONFIG_NAND_SPL */ 129 void board_init_f(ulong bootflag) 130 { 131 board_early_init_f(); 132 NS16550_init((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), 133 CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE); 134 puts("NAND boot... "); 135 init_timebase(); 136 initdram(0); 137 relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, (gd_t *)gd, 138 CONFIG_SYS_NAND_U_BOOT_RELOC); 139 } 140 141 void board_init_r(gd_t *gd, ulong dest_addr) 142 { 143 nand_boot(); 144 } 145 146 void putc(char c) 147 { 148 if (gd->flags & GD_FLG_SILENT) 149 return; 150 151 if (c == '\n') 152 NS16550_putc((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), '\r'); 153 154 NS16550_putc((NS16550_t)(CONFIG_SYS_IMMR + 0x4500), c); 155 } 156 #endif 157