1 /*
2  * (C) Copyright 2000-2003
3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4  *
5  * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
6  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7  *
8  * See file CREDITS for list of people who contributed to this
9  * project.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License as
13  * published by the Free Software Foundation; either version 2 of
14  * the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24  * MA 02111-1307 USA
25  */
26 
27 #include <config.h>
28 #include <common.h>
29 #include <asm/immap.h>
30 #include <asm/io.h>
31 
32 DECLARE_GLOBAL_DATA_PTR;
33 
34 int checkboard(void)
35 {
36 	puts("Board: ");
37 	puts("Freescale FireEngine 5373 EVB\n");
38 	return 0;
39 };
40 
41 phys_size_t initdram(int board_type)
42 {
43 	sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
44 	u32 dramsize, i;
45 
46 	dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000;
47 
48 	for (i = 0x13; i < 0x20; i++) {
49 		if (dramsize == (1 << i))
50 			break;
51 	}
52 	i--;
53 
54 	out_be32(&sdram->cs0, CONFIG_SYS_SDRAM_BASE | i);
55 	out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
56 	out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
57 
58 	/* Issue PALL */
59 	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
60 
61 	/* Issue LEMR */
62 	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
63 	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000);
64 
65 	udelay(500);
66 
67 	/* Issue PALL */
68 	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
69 
70 	/* Perform two refresh cycles */
71 	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
72 	out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
73 
74 	out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
75 
76 	out_be32(&sdram->ctrl,
77 		(CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00);
78 
79 	udelay(100);
80 
81 	return dramsize;
82 };
83 
84 int testdram(void)
85 {
86 	/* TODO: XXX XXX XXX */
87 	printf("DRAM test not implemented!\n");
88 
89 	return (0);
90 }
91