1 /* 2 * Copyright 2015 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __LS2_QDS_QIXIS_H__ 8 #define __LS2_QDS_QIXIS_H__ 9 10 /* SYSCLK */ 11 #define QIXIS_SYSCLK_66 0x0 12 #define QIXIS_SYSCLK_83 0x1 13 #define QIXIS_SYSCLK_100 0x2 14 #define QIXIS_SYSCLK_125 0x3 15 #define QIXIS_SYSCLK_133 0x4 16 #define QIXIS_SYSCLK_150 0x5 17 #define QIXIS_SYSCLK_160 0x6 18 #define QIXIS_SYSCLK_166 0x7 19 20 /* DDRCLK */ 21 #define QIXIS_DDRCLK_66 0x0 22 #define QIXIS_DDRCLK_100 0x1 23 #define QIXIS_DDRCLK_125 0x2 24 #define QIXIS_DDRCLK_133 0x3 25 26 #define BRDCFG4_EMISEL_MASK 0xE0 27 #define BRDCFG4_EMISEL_SHIFT 5 28 #define BRDCFG9_SFPTX_MASK 0x10 29 #define BRDCFG9_SFPTX_SHIFT 4 30 #endif /*__LS2_QDS_QIXIS_H__*/ 31