1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2015 Freescale Semiconductor, Inc. 4 */ 5 6 #ifndef __LS2_QDS_QIXIS_H__ 7 #define __LS2_QDS_QIXIS_H__ 8 9 /* SYSCLK */ 10 #define QIXIS_SYSCLK_66 0x0 11 #define QIXIS_SYSCLK_83 0x1 12 #define QIXIS_SYSCLK_100 0x2 13 #define QIXIS_SYSCLK_125 0x3 14 #define QIXIS_SYSCLK_133 0x4 15 #define QIXIS_SYSCLK_150 0x5 16 #define QIXIS_SYSCLK_160 0x6 17 #define QIXIS_SYSCLK_166 0x7 18 19 /* DDRCLK */ 20 #define QIXIS_DDRCLK_66 0x0 21 #define QIXIS_DDRCLK_100 0x1 22 #define QIXIS_DDRCLK_125 0x2 23 #define QIXIS_DDRCLK_133 0x3 24 25 #define BRDCFG4_EMISEL_MASK 0xE0 26 #define BRDCFG4_EMISEL_SHIFT 5 27 #define BRDCFG9_SFPTX_MASK 0x10 28 #define BRDCFG9_SFPTX_SHIFT 4 29 #endif /*__LS2_QDS_QIXIS_H__*/ 30