144937214SPrabhakar Kushwaha /* 244937214SPrabhakar Kushwaha * Copyright 2015 Freescale Semiconductor, Inc. 344937214SPrabhakar Kushwaha * 444937214SPrabhakar Kushwaha * SPDX-License-Identifier: GPL-2.0+ 544937214SPrabhakar Kushwaha */ 644937214SPrabhakar Kushwaha 744937214SPrabhakar Kushwaha #ifndef __DDR_H__ 844937214SPrabhakar Kushwaha #define __DDR_H__ 944937214SPrabhakar Kushwaha struct board_specific_parameters { 1044937214SPrabhakar Kushwaha u32 n_ranks; 1144937214SPrabhakar Kushwaha u32 datarate_mhz_high; 1244937214SPrabhakar Kushwaha u32 rank_gb; 1344937214SPrabhakar Kushwaha u32 clk_adjust; 1444937214SPrabhakar Kushwaha u32 wrlvl_start; 1544937214SPrabhakar Kushwaha u32 wrlvl_ctl_2; 1644937214SPrabhakar Kushwaha u32 wrlvl_ctl_3; 1744937214SPrabhakar Kushwaha }; 1844937214SPrabhakar Kushwaha 1944937214SPrabhakar Kushwaha /* 2044937214SPrabhakar Kushwaha * These tables contain all valid speeds we want to override with board 2144937214SPrabhakar Kushwaha * specific parameters. datarate_mhz_high values need to be in ascending order 2244937214SPrabhakar Kushwaha * for each n_ranks group. 2344937214SPrabhakar Kushwaha */ 2444937214SPrabhakar Kushwaha 2544937214SPrabhakar Kushwaha static const struct board_specific_parameters udimm0[] = { 2644937214SPrabhakar Kushwaha /* 2744937214SPrabhakar Kushwaha * memory controller 0 2844937214SPrabhakar Kushwaha * num| hi| rank| clk| wrlvl | wrlvl | wrlvl 2944937214SPrabhakar Kushwaha * ranks| mhz| GB |adjst| start | ctl2 | ctl3 3044937214SPrabhakar Kushwaha */ 31*e04f9d0cSShengzhou Liu {2, 1350, 0, 8, 6, 0x0708090B, 0x0C0D0E09,}, 32*e04f9d0cSShengzhou Liu {2, 1666, 0, 8, 7, 0x08090A0C, 0x0D0F100B,}, 33*e04f9d0cSShengzhou Liu {2, 1900, 0, 8, 7, 0x09090B0D, 0x0E10120B,}, 34*e04f9d0cSShengzhou Liu {2, 2300, 0, 8, 8, 0x090A0C0F, 0x1012130C,}, 3544937214SPrabhakar Kushwaha {} 3644937214SPrabhakar Kushwaha }; 3744937214SPrabhakar Kushwaha 3844937214SPrabhakar Kushwaha /* DP-DDR DIMM */ 3944937214SPrabhakar Kushwaha static const struct board_specific_parameters udimm2[] = { 4044937214SPrabhakar Kushwaha /* 4144937214SPrabhakar Kushwaha * memory controller 2 4244937214SPrabhakar Kushwaha * num| hi| rank| clk| wrlvl | wrlvl | wrlvl 4344937214SPrabhakar Kushwaha * ranks| mhz| GB |adjst| start | ctl2 | ctl3 4444937214SPrabhakar Kushwaha */ 45*e04f9d0cSShengzhou Liu {2, 1350, 0, 8, 0xd, 0x0C0A0A00, 0x00000009,}, 46*e04f9d0cSShengzhou Liu {2, 1666, 0, 8, 0xd, 0x0C0A0A00, 0x00000009,}, 47*e04f9d0cSShengzhou Liu {2, 1900, 0, 8, 0xe, 0x0D0C0B00, 0x0000000A,}, 48*e04f9d0cSShengzhou Liu {2, 2200, 0, 8, 0xe, 0x0D0C0B00, 0x0000000A,}, 4944937214SPrabhakar Kushwaha {} 5044937214SPrabhakar Kushwaha }; 5144937214SPrabhakar Kushwaha 5244937214SPrabhakar Kushwaha static const struct board_specific_parameters rdimm0[] = { 5344937214SPrabhakar Kushwaha /* 5444937214SPrabhakar Kushwaha * memory controller 0 5544937214SPrabhakar Kushwaha * num| hi| rank| clk| wrlvl | wrlvl | wrlvl 5644937214SPrabhakar Kushwaha * ranks| mhz| GB |adjst| start | ctl2 | ctl3 5744937214SPrabhakar Kushwaha */ 58*e04f9d0cSShengzhou Liu {2, 1350, 0, 8, 6, 0x0708090B, 0x0C0D0E09,}, 59*e04f9d0cSShengzhou Liu {2, 1666, 0, 8, 7, 0x08090A0C, 0x0D0F100B,}, 60*e04f9d0cSShengzhou Liu {2, 1900, 0, 8, 7, 0x09090B0D, 0x0E10120B,}, 61*e04f9d0cSShengzhou Liu {2, 2200, 0, 8, 8, 0x090A0C0F, 0x1012130C,}, 6244937214SPrabhakar Kushwaha {} 6344937214SPrabhakar Kushwaha }; 6444937214SPrabhakar Kushwaha 6544937214SPrabhakar Kushwaha /* DP-DDR DIMM */ 6644937214SPrabhakar Kushwaha static const struct board_specific_parameters rdimm2[] = { 6744937214SPrabhakar Kushwaha /* 6844937214SPrabhakar Kushwaha * memory controller 2 6944937214SPrabhakar Kushwaha * num| hi| rank| clk| wrlvl | wrlvl | wrlvl 7044937214SPrabhakar Kushwaha * ranks| mhz| GB |adjst| start | ctl2 | ctl3 7144937214SPrabhakar Kushwaha */ 72*e04f9d0cSShengzhou Liu {2, 1350, 0, 8, 6, 0x0708090B, 0x0C0D0E09,}, 73*e04f9d0cSShengzhou Liu {2, 1666, 0, 8, 7, 0x0B0A090C, 0x0D0F100B,}, 74*e04f9d0cSShengzhou Liu {2, 1900, 0, 8, 7, 0x09090B0D, 0x0E10120B,}, 75*e04f9d0cSShengzhou Liu {2, 2200, 0, 8, 8, 0x090A0C0F, 0x1012130C,}, 7644937214SPrabhakar Kushwaha {} 7744937214SPrabhakar Kushwaha }; 7844937214SPrabhakar Kushwaha 7944937214SPrabhakar Kushwaha static const struct board_specific_parameters *udimms[] = { 8044937214SPrabhakar Kushwaha udimm0, 8144937214SPrabhakar Kushwaha udimm0, 8244937214SPrabhakar Kushwaha udimm2, 8344937214SPrabhakar Kushwaha }; 8444937214SPrabhakar Kushwaha 8544937214SPrabhakar Kushwaha static const struct board_specific_parameters *rdimms[] = { 8644937214SPrabhakar Kushwaha rdimm0, 8744937214SPrabhakar Kushwaha rdimm0, 8844937214SPrabhakar Kushwaha rdimm2, 8944937214SPrabhakar Kushwaha }; 9044937214SPrabhakar Kushwaha 9144937214SPrabhakar Kushwaha 9244937214SPrabhakar Kushwaha #endif 93