1 /*
2  * Copyright 2016 Freescale Semiconductor
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  *
6  * Freescale LS1046ARDB board-specific CPLD controlling supports.
7  */
8 
9 #include <common.h>
10 #include <command.h>
11 #include <asm/io.h>
12 #include "cpld.h"
13 
14 u8 cpld_read(unsigned int reg)
15 {
16 	void *p = (void *)CONFIG_SYS_CPLD_BASE;
17 
18 	return in_8(p + reg);
19 }
20 
21 void cpld_write(unsigned int reg, u8 value)
22 {
23 	void *p = (void *)CONFIG_SYS_CPLD_BASE;
24 
25 	out_8(p + reg, value);
26 }
27 
28 /* Set the boot bank to the alternate bank */
29 void cpld_set_altbank(void)
30 {
31 	u16 reg = CPLD_CFG_RCW_SRC_QSPI;
32 	u8 reg4 = CPLD_READ(soft_mux_on);
33 	u8 reg5 = (u8)(reg >> 1);
34 	u8 reg6 = (u8)(reg & 1);
35 	u8 reg7 = CPLD_READ(vbank);
36 
37 	cpld_rev_bit(&reg5);
38 
39 	CPLD_WRITE(soft_mux_on, reg4 | CPLD_SW_MUX_BANK_SEL | 1);
40 
41 	CPLD_WRITE(cfg_rcw_src1, reg5);
42 	CPLD_WRITE(cfg_rcw_src2, reg6);
43 
44 	reg7 = (reg7 & ~CPLD_BANK_SEL_MASK) | CPLD_BANK_SEL_ALTBANK;
45 	CPLD_WRITE(vbank, reg7);
46 
47 	CPLD_WRITE(system_rst, 1);
48 }
49 
50 /* Set the boot bank to the default bank */
51 void cpld_set_defbank(void)
52 {
53 	u16 reg = CPLD_CFG_RCW_SRC_QSPI;
54 	u8 reg4 = CPLD_READ(soft_mux_on);
55 	u8 reg5 = (u8)(reg >> 1);
56 	u8 reg6 = (u8)(reg & 1);
57 
58 	cpld_rev_bit(&reg5);
59 
60 	CPLD_WRITE(soft_mux_on, reg4 | CPLD_SW_MUX_BANK_SEL | 1);
61 
62 	CPLD_WRITE(cfg_rcw_src1, reg5);
63 	CPLD_WRITE(cfg_rcw_src2, reg6);
64 
65 	CPLD_WRITE(vbank, 0);
66 
67 	CPLD_WRITE(system_rst, 1);
68 }
69 
70 void cpld_set_sd(void)
71 {
72 	u16 reg = CPLD_CFG_RCW_SRC_SD;
73 	u8 reg5 = (u8)(reg >> 1);
74 	u8 reg6 = (u8)(reg & 1);
75 
76 	cpld_rev_bit(&reg5);
77 
78 	CPLD_WRITE(soft_mux_on, 1);
79 
80 	CPLD_WRITE(cfg_rcw_src1, reg5);
81 	CPLD_WRITE(cfg_rcw_src2, reg6);
82 
83 	CPLD_WRITE(system_rst, 1);
84 }
85 
86 void cpld_select_core_volt(bool en_0v9)
87 {
88 	u8 reg17 = en_0v9;
89 
90 	CPLD_WRITE(vdd_en, 1);
91 	CPLD_WRITE(vdd_sel, reg17);
92 }
93 
94 #ifdef DEBUG
95 static void cpld_dump_regs(void)
96 {
97 	printf("cpld_ver	= %x\n", CPLD_READ(cpld_ver));
98 	printf("cpld_ver_sub	= %x\n", CPLD_READ(cpld_ver_sub));
99 	printf("pcba_ver	= %x\n", CPLD_READ(pcba_ver));
100 	printf("soft_mux_on	= %x\n", CPLD_READ(soft_mux_on));
101 	printf("cfg_rcw_src1	= %x\n", CPLD_READ(cfg_rcw_src1));
102 	printf("cfg_rcw_src2	= %x\n", CPLD_READ(cfg_rcw_src2));
103 	printf("vbank		= %x\n", CPLD_READ(vbank));
104 	printf("sysclk_sel	= %x\n", CPLD_READ(sysclk_sel));
105 	printf("uart_sel	= %x\n", CPLD_READ(uart_sel));
106 	printf("sd1refclk_sel	= %x\n", CPLD_READ(sd1refclk_sel));
107 	printf("rgmii_1588_sel	= %x\n", CPLD_READ(rgmii_1588_sel));
108 	printf("1588_clk_sel	= %x\n", CPLD_READ(reg_1588_clk_sel));
109 	printf("status_led	= %x\n", CPLD_READ(status_led));
110 	printf("sd_emmc		= %x\n", CPLD_READ(sd_emmc));
111 	printf("vdd_en		= %x\n", CPLD_READ(vdd_en));
112 	printf("vdd_sel		= %x\n", CPLD_READ(vdd_sel));
113 	putc('\n');
114 }
115 #endif
116 
117 void cpld_rev_bit(unsigned char *value)
118 {
119 	u8 rev_val, val;
120 	int i;
121 
122 	val = *value;
123 	rev_val = val & 1;
124 	for (i = 1; i <= 7; i++) {
125 		val >>= 1;
126 		rev_val <<= 1;
127 		rev_val |= val & 1;
128 	}
129 
130 	*value = rev_val;
131 }
132 
133 int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
134 {
135 	int rc = 0;
136 
137 	if (argc <= 1)
138 		return cmd_usage(cmdtp);
139 
140 	if (strcmp(argv[1], "reset") == 0) {
141 		if (strcmp(argv[2], "altbank") == 0)
142 			cpld_set_altbank();
143 		else if (strcmp(argv[2], "sd") == 0)
144 			cpld_set_sd();
145 		else
146 			cpld_set_defbank();
147 #ifdef DEBUG
148 	} else if (strcmp(argv[1], "dump") == 0) {
149 		cpld_dump_regs();
150 #endif
151 	} else {
152 		rc = cmd_usage(cmdtp);
153 	}
154 
155 	return rc;
156 }
157 
158 U_BOOT_CMD(
159 	cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
160 	"Reset the board or alternate bank",
161 	"reset: reset to default bank\n"
162 	"cpld reset altbank: reset to alternate bank\n"
163 	"cpld reset sd: reset to boot from SD card\n"
164 #ifdef DEBUG
165 	"cpld dump - display the CPLD registers\n"
166 #endif
167 );
168