1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright 2015 Freescale Semiconductor, Inc. 4 */ 5 #include <common.h> 6 #include <asm/io.h> 7 #include <netdev.h> 8 #include <fm_eth.h> 9 #include <fsl_dtsec.h> 10 #include <fsl_mdio.h> 11 #include <malloc.h> 12 13 #include "../common/fman.h" 14 15 int board_eth_init(bd_t *bis) 16 { 17 #ifdef CONFIG_FMAN_ENET 18 int i; 19 struct memac_mdio_info dtsec_mdio_info; 20 struct memac_mdio_info tgec_mdio_info; 21 struct mii_dev *dev; 22 u32 srds_s1; 23 struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); 24 25 srds_s1 = in_be32(&gur->rcwsr[4]) & 26 FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; 27 srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT; 28 29 dtsec_mdio_info.regs = 30 (struct memac_mdio_controller *)CONFIG_SYS_FM1_DTSEC_MDIO_ADDR; 31 32 dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME; 33 34 /* Register the 1G MDIO bus */ 35 fm_memac_mdio_init(bis, &dtsec_mdio_info); 36 37 tgec_mdio_info.regs = 38 (struct memac_mdio_controller *)CONFIG_SYS_FM1_TGEC_MDIO_ADDR; 39 tgec_mdio_info.name = DEFAULT_FM_TGEC_MDIO_NAME; 40 41 /* Register the 10G MDIO bus */ 42 fm_memac_mdio_init(bis, &tgec_mdio_info); 43 44 /* Set the two on-board RGMII PHY address */ 45 fm_info_set_phy_address(FM1_DTSEC3, RGMII_PHY1_ADDR); 46 fm_info_set_phy_address(FM1_DTSEC4, RGMII_PHY2_ADDR); 47 48 /* QSGMII on lane B, MAC 1/2/5/6 */ 49 fm_info_set_phy_address(FM1_DTSEC1, QSGMII_PORT1_PHY_ADDR); 50 fm_info_set_phy_address(FM1_DTSEC2, QSGMII_PORT2_PHY_ADDR); 51 fm_info_set_phy_address(FM1_DTSEC5, QSGMII_PORT3_PHY_ADDR); 52 fm_info_set_phy_address(FM1_DTSEC6, QSGMII_PORT4_PHY_ADDR); 53 54 switch (srds_s1) { 55 case 0x1455: 56 break; 57 default: 58 printf("Invalid SerDes protocol 0x%x for LS1043ARDB\n", 59 srds_s1); 60 break; 61 } 62 63 dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); 64 for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) 65 fm_info_set_mdio(i, dev); 66 67 /* XFI on lane A, MAC 9 */ 68 fm_info_set_phy_address(FM1_10GEC1, FM1_10GEC1_PHY_ADDR); 69 dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME); 70 fm_info_set_mdio(FM1_10GEC1, dev); 71 72 cpu_eth_init(bis); 73 #endif 74 75 return pci_eth_init(bis); 76 } 77