1 /* 2 * Copyright 2015 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 #include <common.h> 7 #include <asm/io.h> 8 #include <netdev.h> 9 #include <fm_eth.h> 10 #include <fsl_dtsec.h> 11 #include <fsl_mdio.h> 12 #include <malloc.h> 13 14 #include "../common/fman.h" 15 16 int board_eth_init(bd_t *bis) 17 { 18 #ifdef CONFIG_FMAN_ENET 19 int i; 20 struct memac_mdio_info dtsec_mdio_info; 21 struct memac_mdio_info tgec_mdio_info; 22 struct mii_dev *dev; 23 u32 srds_s1; 24 struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); 25 26 srds_s1 = in_be32(&gur->rcwsr[4]) & 27 FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK; 28 srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT; 29 30 dtsec_mdio_info.regs = 31 (struct memac_mdio_controller *)CONFIG_SYS_FM1_DTSEC_MDIO_ADDR; 32 33 dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME; 34 35 /* Register the 1G MDIO bus */ 36 fm_memac_mdio_init(bis, &dtsec_mdio_info); 37 38 tgec_mdio_info.regs = 39 (struct memac_mdio_controller *)CONFIG_SYS_FM1_TGEC_MDIO_ADDR; 40 tgec_mdio_info.name = DEFAULT_FM_TGEC_MDIO_NAME; 41 42 /* Register the 10G MDIO bus */ 43 fm_memac_mdio_init(bis, &tgec_mdio_info); 44 45 /* Set the two on-board RGMII PHY address */ 46 fm_info_set_phy_address(FM1_DTSEC3, RGMII_PHY1_ADDR); 47 fm_info_set_phy_address(FM1_DTSEC4, RGMII_PHY2_ADDR); 48 49 /* QSGMII on lane B, MAC 1/2/5/6 */ 50 fm_info_set_phy_address(FM1_DTSEC1, QSGMII_PORT1_PHY_ADDR); 51 fm_info_set_phy_address(FM1_DTSEC2, QSGMII_PORT2_PHY_ADDR); 52 fm_info_set_phy_address(FM1_DTSEC5, QSGMII_PORT3_PHY_ADDR); 53 fm_info_set_phy_address(FM1_DTSEC6, QSGMII_PORT4_PHY_ADDR); 54 55 switch (srds_s1) { 56 case 0x1455: 57 break; 58 default: 59 printf("Invalid SerDes protocol 0x%x for LS1043ARDB\n", 60 srds_s1); 61 break; 62 } 63 64 dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); 65 for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) 66 fm_info_set_mdio(i, dev); 67 68 /* XFI on lane A, MAC 9 */ 69 fm_info_set_phy_address(FM1_10GEC1, FM1_10GEC1_PHY_ADDR); 70 dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME); 71 fm_info_set_mdio(FM1_10GEC1, dev); 72 73 cpu_eth_init(bis); 74 #endif 75 76 return pci_eth_init(bis); 77 } 78