1 /*
2  * Copyright 2015 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef __DDR_H__
8 #define __DDR_H__
9 struct board_specific_parameters {
10 	u32 n_ranks;
11 	u32 datarate_mhz_high;
12 	u32 rank_gb;
13 	u32 clk_adjust;
14 	u32 wrlvl_start;
15 	u32 wrlvl_ctl_2;
16 	u32 wrlvl_ctl_3;
17 	u32 cpo_override;
18 	u32 write_data_delay;
19 	u32 force_2t;
20 };
21 
22 /*
23  * These tables contain all valid speeds we want to override with board
24  * specific parameters. datarate_mhz_high values need to be in ascending order
25  * for each n_ranks group.
26  */
27 static const struct board_specific_parameters udimm0[] = {
28 	/*
29 	 * memory controller 0
30 	 *   num|  hi| rank|  clk| wrlvl |   wrlvl   |  wrlvl | cpo  |wrdata|2T
31 	 * ranks| mhz| GB  |adjst| start |   ctl2    |  ctl3  |      |delay |
32 	 */
33 #ifdef CONFIG_SYS_FSL_DDR4
34 	{1,  1666, 0, 6,     7, 0x07090800, 0x00000000,},
35 	{1,  1900, 0, 6,     7, 0x07090800, 0x00000000,},
36 	{1,  2200, 0, 6,     7, 0x07090800, 0x00000000,},
37 #endif
38 	{}
39 };
40 
41 static const struct board_specific_parameters *udimms[] = {
42 	udimm0,
43 };
44 
45 #endif
46