1 /*
2  * Copyright 2015 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef __DDR_H__
8 #define __DDR_H__
9 
10 extern void erratum_a008850_post(void);
11 
12 struct board_specific_parameters {
13 	u32 n_ranks;
14 	u32 datarate_mhz_high;
15 	u32 rank_gb;
16 	u32 clk_adjust;
17 	u32 wrlvl_start;
18 	u32 wrlvl_ctl_2;
19 	u32 wrlvl_ctl_3;
20 	u32 cpo_override;
21 	u32 write_data_delay;
22 	u32 force_2t;
23 };
24 
25 /*
26  * These tables contain all valid speeds we want to override with board
27  * specific parameters. datarate_mhz_high values need to be in ascending order
28  * for each n_ranks group.
29  */
30 static const struct board_specific_parameters udimm0[] = {
31 	/*
32 	 * memory controller 0
33 	 *   num|  hi| rank|  clk| wrlvl |   wrlvl   |  wrlvl | cpo  |wrdata|2T
34 	 * ranks| mhz| GB  |adjst| start |   ctl2    |  ctl3  |      |delay |
35 	 */
36 #ifdef CONFIG_SYS_FSL_DDR4
37 	{2,  1666, 0,  8,     7, 0x0808090B, 0x0C0D0E0A,},
38 	{2,  1900, 0,  8,     6, 0x08080A0C, 0x0D0E0F0A,},
39 	{1,  1666, 0,  8,     6, 0x0708090B, 0x0C0D0E0A,},
40 	{1,  1900, 0,  8,     9, 0x0A0B0C0B, 0x0D0E0F0D,},
41 	{1,  2200, 0,  8,    10, 0x0B0C0D0C, 0x0E0F110E,},
42 #elif defined(CONFIG_SYS_FSL_DDR3)
43 	{1,  833,  1, 12,     8, 0x06060607, 0x08080807,   0x1f,    2,  0},
44 	{1,  1350, 1, 12,     8, 0x0708080A, 0x0A0B0C09,   0x1f,    2,  0},
45 	{1,  833,  2, 12,     8, 0x06060607, 0x08080807,   0x1f,    2,  0},
46 	{1,  1350, 2, 12,     8, 0x0708080A, 0x0A0B0C09,   0x1f,    2,  0},
47 	{2,  833,  4, 12,     8, 0x06060607, 0x08080807,   0x1f,    2,  0},
48 	{2,  1350, 4, 12,     8, 0x0708080A, 0x0A0B0C09,   0x1f,    2,  0},
49 	{2,  1350, 0, 12,     8, 0x0708080A, 0x0A0B0C09,   0x1f,    2,  0},
50 	{2,  1666, 4,  8,   0xa, 0x0B08090C, 0x0B0E0D0A,   0x1f,    2,  0},
51 	{2,  1666, 0,  8,   0xa, 0x0B08090C, 0x0B0E0D0A,   0x1f,    2,  0},
52 #else
53 #error DDR type not defined
54 #endif
55 	{}
56 };
57 
58 static const struct board_specific_parameters *udimms[] = {
59 	udimm0,
60 };
61 
62 #endif
63