1 /* 2 * Copyright 2014 Freescale Semiconductor, Inc. 3 * 4 * FSL DCU Framebuffer driver 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #include <asm/io.h> 10 #include <common.h> 11 #include <fsl_dcu_fb.h> 12 #include <i2c.h> 13 #include "div64.h" 14 #include "../common/diu_ch7301.h" 15 #include "ls1021aqds_qixis.h" 16 17 DECLARE_GLOBAL_DATA_PTR; 18 19 static int select_i2c_ch_pca9547(u8 ch) 20 { 21 int ret; 22 23 ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1); 24 if (ret) { 25 puts("PCA: failed to select proper channel\n"); 26 return ret; 27 } 28 29 return 0; 30 } 31 32 unsigned int dcu_set_pixel_clock(unsigned int pixclock) 33 { 34 unsigned long long div; 35 36 div = (unsigned long long)(gd->bus_clk / 1000); 37 div *= (unsigned long long)pixclock; 38 do_div(div, 1000000000); 39 40 return div; 41 } 42 43 int platform_dcu_init(unsigned int xres, unsigned int yres, 44 const char *port, 45 struct fb_videomode *dcu_fb_videomode) 46 { 47 const char *name; 48 unsigned int pixel_format; 49 int ret; 50 u8 ch; 51 52 /* Mux I2C3+I2C4 as HSYNC+VSYNC */ 53 ret = i2c_read(CONFIG_SYS_I2C_QIXIS_ADDR, QIXIS_DCU_BRDCFG5, 54 1, &ch, 1); 55 if (ret) { 56 printf("Error: failed to read I2C @%02x\n", 57 CONFIG_SYS_I2C_QIXIS_ADDR); 58 return ret; 59 } 60 ch &= 0x1F; 61 ch |= 0xA0; 62 ret = i2c_write(CONFIG_SYS_I2C_QIXIS_ADDR, QIXIS_DCU_BRDCFG5, 63 1, &ch, 1); 64 if (ret) { 65 printf("Error: failed to write I2C @%02x\n", 66 CONFIG_SYS_I2C_QIXIS_ADDR); 67 return ret; 68 } 69 70 if (strncmp(port, "hdmi", 4) == 0) { 71 unsigned long pixval; 72 73 name = "HDMI"; 74 75 pixval = 1000000000 / dcu_fb_videomode->pixclock; 76 pixval *= 1000; 77 78 i2c_set_bus_num(CONFIG_SYS_I2C_DVI_BUS_NUM); 79 select_i2c_ch_pca9547(I2C_MUX_CH_CH7301); 80 diu_set_dvi_encoder(pixval); 81 select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); 82 } else { 83 return 0; 84 } 85 86 printf("DCU: Switching to %s monitor @ %ux%u\n", name, xres, yres); 87 88 pixel_format = 32; 89 fsl_dcu_init(xres, yres, pixel_format); 90 91 return 0; 92 } 93