1 /* 2 * Copyright 2016 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <i2c.h> 9 #include <asm/io.h> 10 #include <asm/arch/clock.h> 11 #include <asm/arch/fsl_serdes.h> 12 #include <asm/arch/soc.h> 13 #include <hwconfig.h> 14 #include <ahci.h> 15 #include <mmc.h> 16 #include <scsi.h> 17 #include <fsl_esdhc.h> 18 #include <environment.h> 19 #include <fsl_mmdc.h> 20 #include <netdev.h> 21 22 DECLARE_GLOBAL_DATA_PTR; 23 24 int checkboard(void) 25 { 26 u8 in1; 27 28 puts("Board: LS1012ARDB "); 29 30 /* Initialize i2c early for Serial flash bank information */ 31 i2c_set_bus_num(0); 32 33 if (i2c_read(I2C_MUX_IO1_ADDR, 1, 1, &in1, 1) < 0) { 34 printf("Error reading i2c boot information!\n"); 35 return 0; /* Don't want to hang() on this error */ 36 } 37 38 puts("Version"); 39 if ((in1 & (~__SW_REV_MASK)) == __SW_REV_A) 40 puts(": RevA"); 41 else if ((in1 & (~__SW_REV_MASK)) == __SW_REV_B) 42 puts(": RevB"); 43 else 44 puts(": unknown"); 45 46 printf(", boot from QSPI"); 47 if ((in1 & (~__SW_BOOT_MASK)) == __SW_BOOT_EMU) 48 puts(": emu\n"); 49 else if ((in1 & (~__SW_BOOT_MASK)) == __SW_BOOT_BANK1) 50 puts(": bank1\n"); 51 else if ((in1 & (~__SW_BOOT_MASK)) == __SW_BOOT_BANK2) 52 puts(": bank2\n"); 53 else 54 puts("unknown\n"); 55 56 return 0; 57 } 58 59 int dram_init(void) 60 { 61 static const struct fsl_mmdc_info mparam = { 62 0x05180000, /* mdctl */ 63 0x00030035, /* mdpdc */ 64 0x12554000, /* mdotc */ 65 0xbabf7954, /* mdcfg0 */ 66 0xdb328f64, /* mdcfg1 */ 67 0x01ff00db, /* mdcfg2 */ 68 0x00001680, /* mdmisc */ 69 0x0f3c8000, /* mdref */ 70 0x00002000, /* mdrwd */ 71 0x00bf1023, /* mdor */ 72 0x0000003f, /* mdasp */ 73 0x0000022a, /* mpodtctrl */ 74 0xa1390003, /* mpzqhwctrl */ 75 }; 76 77 mmdc_init(&mparam); 78 79 gd->ram_size = CONFIG_SYS_SDRAM_SIZE; 80 81 return 0; 82 } 83 84 int board_eth_init(bd_t *bis) 85 { 86 return pci_eth_init(bis); 87 } 88 89 int board_early_init_f(void) 90 { 91 fsl_lsch2_early_init_f(); 92 93 return 0; 94 } 95 96 int board_init(void) 97 { 98 struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; 99 /* 100 * Set CCI-400 control override register to enable barrier 101 * transaction 102 */ 103 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); 104 105 #ifdef CONFIG_SYS_FSL_ERRATUM_A010315 106 erratum_a010315(); 107 #endif 108 109 #ifdef CONFIG_ENV_IS_NOWHERE 110 gd->env_addr = (ulong)&default_environment[0]; 111 #endif 112 113 return 0; 114 } 115 116 int ft_board_setup(void *blob, bd_t *bd) 117 { 118 arch_fixup_fdt(blob); 119 120 ft_cpu_setup(blob, bd); 121 122 return 0; 123 } 124