1 /*
2  * Copyright 2016 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <i2c.h>
9 #include <asm/io.h>
10 #include <asm/arch/clock.h>
11 #include <asm/arch/fsl_serdes.h>
12 #ifdef CONFIG_FSL_LS_PPA
13 #include <asm/arch/ppa.h>
14 #endif
15 #include <asm/arch/mmu.h>
16 #include <asm/arch/soc.h>
17 #include <hwconfig.h>
18 #include <ahci.h>
19 #include <mmc.h>
20 #include <scsi.h>
21 #include <fsl_esdhc.h>
22 #include <environment.h>
23 #include <fsl_mmdc.h>
24 #include <netdev.h>
25 
26 DECLARE_GLOBAL_DATA_PTR;
27 
28 int checkboard(void)
29 {
30 	u8 in1;
31 
32 	puts("Board: LS1012ARDB ");
33 
34 	/* Initialize i2c early for Serial flash bank information */
35 	i2c_set_bus_num(0);
36 
37 	if (i2c_read(I2C_MUX_IO1_ADDR, 1, 1, &in1, 1) < 0) {
38 		printf("Error reading i2c boot information!\n");
39 		return 0; /* Don't want to hang() on this error */
40 	}
41 
42 	puts("Version");
43 	if ((in1 & (~__SW_REV_MASK)) == __SW_REV_A)
44 		puts(": RevA");
45 	else if ((in1 & (~__SW_REV_MASK)) == __SW_REV_B)
46 		puts(": RevB");
47 	else
48 		puts(": unknown");
49 
50 	printf(", boot from QSPI");
51 	if ((in1 & (~__SW_BOOT_MASK)) == __SW_BOOT_EMU)
52 		puts(": emu\n");
53 	else if ((in1 & (~__SW_BOOT_MASK)) == __SW_BOOT_BANK1)
54 		puts(": bank1\n");
55 	else if ((in1 & (~__SW_BOOT_MASK)) == __SW_BOOT_BANK2)
56 		puts(": bank2\n");
57 	else
58 		puts("unknown\n");
59 
60 	return 0;
61 }
62 
63 int dram_init(void)
64 {
65 	static const struct fsl_mmdc_info mparam = {
66 		0x05180000,	/* mdctl */
67 		0x00030035,	/* mdpdc */
68 		0x12554000,	/* mdotc */
69 		0xbabf7954,	/* mdcfg0 */
70 		0xdb328f64,	/* mdcfg1 */
71 		0x01ff00db,	/* mdcfg2 */
72 		0x00001680,	/* mdmisc */
73 		0x0f3c8000,	/* mdref */
74 		0x00002000,	/* mdrwd */
75 		0x00bf1023,	/* mdor */
76 		0x0000003f,	/* mdasp */
77 		0x0000022a,	/* mpodtctrl */
78 		0xa1390003,	/* mpzqhwctrl */
79 	};
80 
81 	mmdc_init(&mparam);
82 
83 	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
84 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
85 	/* This will break-before-make MMU for DDR */
86 	update_early_mmu_table();
87 #endif
88 
89 	return 0;
90 }
91 
92 int board_eth_init(bd_t *bis)
93 {
94 	return pci_eth_init(bis);
95 }
96 
97 int board_early_init_f(void)
98 {
99 	fsl_lsch2_early_init_f();
100 
101 	return 0;
102 }
103 
104 int board_init(void)
105 {
106 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
107 	/*
108 	 * Set CCI-400 control override register to enable barrier
109 	 * transaction
110 	 */
111 	out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
112 
113 #ifdef CONFIG_SYS_FSL_ERRATUM_A010315
114 	erratum_a010315();
115 #endif
116 
117 #ifdef CONFIG_ENV_IS_NOWHERE
118 	gd->env_addr = (ulong)&default_environment[0];
119 #endif
120 
121 #ifdef CONFIG_FSL_LS_PPA
122 	ppa_init();
123 #endif
124 	return 0;
125 }
126 
127 int esdhc_status_fixup(void *blob, const char *compat)
128 {
129 	char esdhc0_path[] = "/soc/esdhc@1560000";
130 	char esdhc1_path[] = "/soc/esdhc@1580000";
131 	u8 io = 0;
132 	u8 mux_sdhc2;
133 
134 	do_fixup_by_path(blob, esdhc0_path, "status", "okay",
135 			 sizeof("okay"), 1);
136 
137 	i2c_set_bus_num(0);
138 
139 	/*
140 	 * The I2C IO-expander for mux select is used to control the muxing
141 	 * of various onboard interfaces.
142 	 *
143 	 * IO1[3:2] indicates SDHC2 interface demultiplexer select lines.
144 	 *	00 - SDIO wifi
145 	 *	01 - GPIO (to Arduino)
146 	 *	10 - eMMC Memory
147 	 *	11 - SPI
148 	 */
149 	if (i2c_read(I2C_MUX_IO1_ADDR, 0, 1, &io, 1) < 0) {
150 		printf("Error reading i2c boot information!\n");
151 		return 0; /* Don't want to hang() on this error */
152 	}
153 
154 	mux_sdhc2 = (io & 0x0c) >> 2;
155 	/* Enable SDHC2 only when use SDIO wifi and eMMC */
156 	if (mux_sdhc2 == 2 || mux_sdhc2 == 0)
157 		do_fixup_by_path(blob, esdhc1_path, "status", "okay",
158 				 sizeof("okay"), 1);
159 	else
160 		do_fixup_by_path(blob, esdhc1_path, "status", "disabled",
161 				 sizeof("disabled"), 1);
162 	return 0;
163 }
164 
165 int ft_board_setup(void *blob, bd_t *bd)
166 {
167 	arch_fixup_fdt(blob);
168 
169 	ft_cpu_setup(blob, bd);
170 
171 	return 0;
172 }
173