1 /* 2 * Copyright 2016 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <i2c.h> 9 #include <asm/io.h> 10 #include <asm/arch/clock.h> 11 #include <asm/arch/fsl_serdes.h> 12 #ifdef CONFIG_FSL_LS_PPA 13 #include <asm/arch/ppa.h> 14 #endif 15 #include <asm/arch/mmu.h> 16 #include <asm/arch/soc.h> 17 #include <hwconfig.h> 18 #include <ahci.h> 19 #include <mmc.h> 20 #include <scsi.h> 21 #include <fsl_esdhc.h> 22 #include <environment.h> 23 #include <fsl_mmdc.h> 24 #include <netdev.h> 25 #include <fsl_sec.h> 26 27 DECLARE_GLOBAL_DATA_PTR; 28 29 int checkboard(void) 30 { 31 #ifdef CONFIG_TARGET_LS1012ARDB 32 u8 in1; 33 34 puts("Board: LS1012ARDB "); 35 36 /* Initialize i2c early for Serial flash bank information */ 37 i2c_set_bus_num(0); 38 39 if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &in1, 1) < 0) { 40 printf("Error reading i2c boot information!\n"); 41 return 0; /* Don't want to hang() on this error */ 42 } 43 44 puts("Version"); 45 switch (in1 & SW_REV_MASK) { 46 case SW_REV_A: 47 puts(": RevA"); 48 break; 49 case SW_REV_B: 50 puts(": RevB"); 51 break; 52 case SW_REV_C: 53 puts(": RevC"); 54 break; 55 case SW_REV_C1: 56 puts(": RevC1"); 57 break; 58 case SW_REV_C2: 59 puts(": RevC2"); 60 break; 61 case SW_REV_D: 62 puts(": RevD"); 63 break; 64 case SW_REV_E: 65 puts(": RevE"); 66 break; 67 default: 68 puts(": unknown"); 69 break; 70 } 71 72 printf(", boot from QSPI"); 73 if ((in1 & SW_BOOT_MASK) == SW_BOOT_EMU) 74 puts(": emu\n"); 75 else if ((in1 & SW_BOOT_MASK) == SW_BOOT_BANK1) 76 puts(": bank1\n"); 77 else if ((in1 & SW_BOOT_MASK) == SW_BOOT_BANK2) 78 puts(": bank2\n"); 79 else 80 puts("unknown\n"); 81 #else 82 83 puts("Board: LS1012A2G5RDB "); 84 #endif 85 return 0; 86 } 87 88 int dram_init(void) 89 { 90 static const struct fsl_mmdc_info mparam = { 91 0x05180000, /* mdctl */ 92 0x00030035, /* mdpdc */ 93 0x12554000, /* mdotc */ 94 0xbabf7954, /* mdcfg0 */ 95 0xdb328f64, /* mdcfg1 */ 96 0x01ff00db, /* mdcfg2 */ 97 0x00001680, /* mdmisc */ 98 0x0f3c8000, /* mdref */ 99 0x00002000, /* mdrwd */ 100 0x00bf1023, /* mdor */ 101 0x0000003f, /* mdasp */ 102 0x0000022a, /* mpodtctrl */ 103 0xa1390003, /* mpzqhwctrl */ 104 }; 105 106 mmdc_init(&mparam); 107 108 gd->ram_size = CONFIG_SYS_SDRAM_SIZE; 109 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) 110 /* This will break-before-make MMU for DDR */ 111 update_early_mmu_table(); 112 #endif 113 114 return 0; 115 } 116 117 int board_eth_init(bd_t *bis) 118 { 119 return pci_eth_init(bis); 120 } 121 122 int board_early_init_f(void) 123 { 124 fsl_lsch2_early_init_f(); 125 126 return 0; 127 } 128 129 int board_init(void) 130 { 131 struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR + 132 CONFIG_SYS_CCI400_OFFSET); 133 /* 134 * Set CCI-400 control override register to enable barrier 135 * transaction 136 */ 137 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); 138 139 #ifdef CONFIG_SYS_FSL_ERRATUM_A010315 140 erratum_a010315(); 141 #endif 142 143 #ifdef CONFIG_ENV_IS_NOWHERE 144 gd->env_addr = (ulong)&default_environment[0]; 145 #endif 146 147 #ifdef CONFIG_FSL_CAAM 148 sec_init(); 149 #endif 150 151 #ifdef CONFIG_FSL_LS_PPA 152 ppa_init(); 153 #endif 154 return 0; 155 } 156 157 #ifdef CONFIG_TARGET_LS1012ARDB 158 int esdhc_status_fixup(void *blob, const char *compat) 159 { 160 char esdhc1_path[] = "/soc/esdhc@1580000"; 161 bool sdhc2_en = false; 162 u8 mux_sdhc2; 163 u8 io = 0; 164 165 i2c_set_bus_num(0); 166 167 /* IO1[7:3] is the field of board revision info. */ 168 if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_1, 1, &io, 1) < 0) { 169 printf("Error reading i2c boot information!\n"); 170 return 0; 171 } 172 173 /* hwconfig method is used for RevD and later versions. */ 174 if ((io & SW_REV_MASK) <= SW_REV_D) { 175 #ifdef CONFIG_HWCONFIG 176 if (hwconfig("esdhc1")) 177 sdhc2_en = true; 178 #endif 179 } else { 180 /* 181 * The I2C IO-expander for mux select is used to control 182 * the muxing of various onboard interfaces. 183 * 184 * IO0[3:2] indicates SDHC2 interface demultiplexer 185 * select lines. 186 * 00 - SDIO wifi 187 * 01 - GPIO (to Arduino) 188 * 10 - eMMC Memory 189 * 11 - SPI 190 */ 191 if (i2c_read(I2C_MUX_IO_ADDR, I2C_MUX_IO_0, 1, &io, 1) < 0) { 192 printf("Error reading i2c boot information!\n"); 193 return 0; 194 } 195 196 mux_sdhc2 = (io & 0x0c) >> 2; 197 /* Enable SDHC2 only when use SDIO wifi and eMMC */ 198 if (mux_sdhc2 == 2 || mux_sdhc2 == 0) 199 sdhc2_en = true; 200 } 201 if (sdhc2_en) 202 do_fixup_by_path(blob, esdhc1_path, "status", "okay", 203 sizeof("okay"), 1); 204 else 205 do_fixup_by_path(blob, esdhc1_path, "status", "disabled", 206 sizeof("disabled"), 1); 207 return 0; 208 } 209 #endif 210 211 int ft_board_setup(void *blob, bd_t *bd) 212 { 213 arch_fixup_fdt(blob); 214 215 ft_cpu_setup(blob, bd); 216 217 return 0; 218 } 219