19d044fcbSPrabhakar Kushwaha /* 29d044fcbSPrabhakar Kushwaha * Copyright 2016 Freescale Semiconductor, Inc. 39d044fcbSPrabhakar Kushwaha * 49d044fcbSPrabhakar Kushwaha * SPDX-License-Identifier: GPL-2.0+ 59d044fcbSPrabhakar Kushwaha */ 69d044fcbSPrabhakar Kushwaha 79d044fcbSPrabhakar Kushwaha #include <common.h> 89d044fcbSPrabhakar Kushwaha #include <i2c.h> 99d044fcbSPrabhakar Kushwaha #include <fdt_support.h> 109d044fcbSPrabhakar Kushwaha #include <asm/io.h> 119d044fcbSPrabhakar Kushwaha #include <asm/arch/clock.h> 129d044fcbSPrabhakar Kushwaha #include <asm/arch/fsl_serdes.h> 139d044fcbSPrabhakar Kushwaha #include <asm/arch/fdt.h> 149d044fcbSPrabhakar Kushwaha #include <asm/arch/soc.h> 159d044fcbSPrabhakar Kushwaha #include <ahci.h> 169d044fcbSPrabhakar Kushwaha #include <hwconfig.h> 179d044fcbSPrabhakar Kushwaha #include <mmc.h> 189d044fcbSPrabhakar Kushwaha #include <scsi.h> 199d044fcbSPrabhakar Kushwaha #include <fm_eth.h> 209d044fcbSPrabhakar Kushwaha #include <fsl_esdhc.h> 219d044fcbSPrabhakar Kushwaha #include <fsl_mmdc.h> 229d044fcbSPrabhakar Kushwaha #include <spl.h> 239d044fcbSPrabhakar Kushwaha #include <netdev.h> 249d044fcbSPrabhakar Kushwaha 259d044fcbSPrabhakar Kushwaha #include "../common/qixis.h" 269d044fcbSPrabhakar Kushwaha #include "ls1012aqds_qixis.h" 279d044fcbSPrabhakar Kushwaha 289d044fcbSPrabhakar Kushwaha DECLARE_GLOBAL_DATA_PTR; 299d044fcbSPrabhakar Kushwaha 309d044fcbSPrabhakar Kushwaha int checkboard(void) 319d044fcbSPrabhakar Kushwaha { 329d044fcbSPrabhakar Kushwaha char buf[64]; 339d044fcbSPrabhakar Kushwaha u8 sw; 349d044fcbSPrabhakar Kushwaha 359d044fcbSPrabhakar Kushwaha sw = QIXIS_READ(arch); 369d044fcbSPrabhakar Kushwaha printf("Board Arch: V%d, ", sw >> 4); 379d044fcbSPrabhakar Kushwaha printf("Board version: %c, boot from ", (sw & 0xf) + 'A' - 1); 389d044fcbSPrabhakar Kushwaha 399d044fcbSPrabhakar Kushwaha sw = QIXIS_READ(brdcfg[QIXIS_LBMAP_BRDCFG_REG]); 409d044fcbSPrabhakar Kushwaha 419d044fcbSPrabhakar Kushwaha if (sw & QIXIS_LBMAP_ALTBANK) 429d044fcbSPrabhakar Kushwaha printf("flash: 2\n"); 439d044fcbSPrabhakar Kushwaha else 449d044fcbSPrabhakar Kushwaha printf("flash: 1\n"); 459d044fcbSPrabhakar Kushwaha 469d044fcbSPrabhakar Kushwaha printf("FPGA: v%d (%s), build %d", 479d044fcbSPrabhakar Kushwaha (int)QIXIS_READ(scver), qixis_read_tag(buf), 489d044fcbSPrabhakar Kushwaha (int)qixis_read_minor()); 499d044fcbSPrabhakar Kushwaha 509d044fcbSPrabhakar Kushwaha /* the timestamp string contains "\n" at the end */ 519d044fcbSPrabhakar Kushwaha printf(" on %s", qixis_read_time(buf)); 529d044fcbSPrabhakar Kushwaha return 0; 539d044fcbSPrabhakar Kushwaha } 549d044fcbSPrabhakar Kushwaha 559d044fcbSPrabhakar Kushwaha int dram_init(void) 569d044fcbSPrabhakar Kushwaha { 57*1fdcc8dfSYork Sun static const struct fsl_mmdc_info mparam = { 58*1fdcc8dfSYork Sun 0x05180000, /* mdctl */ 59*1fdcc8dfSYork Sun 0x00030035, /* mdpdc */ 60*1fdcc8dfSYork Sun 0x12554000, /* mdotc */ 61*1fdcc8dfSYork Sun 0xbabf7954, /* mdcfg0 */ 62*1fdcc8dfSYork Sun 0xdb328f64, /* mdcfg1 */ 63*1fdcc8dfSYork Sun 0x01ff00db, /* mdcfg2 */ 64*1fdcc8dfSYork Sun 0x00001680, /* mdmisc */ 65*1fdcc8dfSYork Sun 0x0f3c8000, /* mdref */ 66*1fdcc8dfSYork Sun 0x00002000, /* mdrwd */ 67*1fdcc8dfSYork Sun 0x00bf1023, /* mdor */ 68*1fdcc8dfSYork Sun 0x0000003f, /* mdasp */ 69*1fdcc8dfSYork Sun 0x0000022a, /* mpodtctrl */ 70*1fdcc8dfSYork Sun 0xa1390003, /* mpzqhwctrl */ 71*1fdcc8dfSYork Sun }; 72*1fdcc8dfSYork Sun 73*1fdcc8dfSYork Sun mmdc_init(&mparam); 749d044fcbSPrabhakar Kushwaha 759d044fcbSPrabhakar Kushwaha gd->ram_size = CONFIG_SYS_SDRAM_SIZE; 769d044fcbSPrabhakar Kushwaha 779d044fcbSPrabhakar Kushwaha return 0; 789d044fcbSPrabhakar Kushwaha } 799d044fcbSPrabhakar Kushwaha 809d044fcbSPrabhakar Kushwaha int board_early_init_f(void) 819d044fcbSPrabhakar Kushwaha { 829d044fcbSPrabhakar Kushwaha fsl_lsch2_early_init_f(); 839d044fcbSPrabhakar Kushwaha 849d044fcbSPrabhakar Kushwaha return 0; 859d044fcbSPrabhakar Kushwaha } 869d044fcbSPrabhakar Kushwaha 879d044fcbSPrabhakar Kushwaha #ifdef CONFIG_MISC_INIT_R 889d044fcbSPrabhakar Kushwaha int misc_init_r(void) 899d044fcbSPrabhakar Kushwaha { 909d044fcbSPrabhakar Kushwaha u8 mux_sdhc_cd = 0x80; 919d044fcbSPrabhakar Kushwaha 929d044fcbSPrabhakar Kushwaha i2c_set_bus_num(0); 939d044fcbSPrabhakar Kushwaha 949d044fcbSPrabhakar Kushwaha i2c_write(CONFIG_SYS_I2C_FPGA_ADDR, 0x5a, 1, &mux_sdhc_cd, 1); 959d044fcbSPrabhakar Kushwaha return 0; 969d044fcbSPrabhakar Kushwaha } 979d044fcbSPrabhakar Kushwaha #endif 989d044fcbSPrabhakar Kushwaha 999d044fcbSPrabhakar Kushwaha int board_init(void) 1009d044fcbSPrabhakar Kushwaha { 1019d044fcbSPrabhakar Kushwaha struct ccsr_cci400 *cci = (struct ccsr_cci400 *) 1029d044fcbSPrabhakar Kushwaha CONFIG_SYS_CCI400_ADDR; 1039d044fcbSPrabhakar Kushwaha 1049d044fcbSPrabhakar Kushwaha /* Set CCI-400 control override register to enable barrier 1059d044fcbSPrabhakar Kushwaha * transaction */ 1069d044fcbSPrabhakar Kushwaha out_le32(&cci->ctrl_ord, 1079d044fcbSPrabhakar Kushwaha CCI400_CTRLORD_EN_BARRIER); 1089d044fcbSPrabhakar Kushwaha 109b392a6d4SHou Zhiqiang #ifdef CONFIG_SYS_FSL_ERRATUM_A010315 110b392a6d4SHou Zhiqiang erratum_a010315(); 111b392a6d4SHou Zhiqiang #endif 112b392a6d4SHou Zhiqiang 1139d044fcbSPrabhakar Kushwaha #ifdef CONFIG_ENV_IS_NOWHERE 1149d044fcbSPrabhakar Kushwaha gd->env_addr = (ulong)&default_environment[0]; 1159d044fcbSPrabhakar Kushwaha #endif 1169d044fcbSPrabhakar Kushwaha return 0; 1179d044fcbSPrabhakar Kushwaha } 1189d044fcbSPrabhakar Kushwaha 1199d044fcbSPrabhakar Kushwaha int board_eth_init(bd_t *bis) 1209d044fcbSPrabhakar Kushwaha { 1219d044fcbSPrabhakar Kushwaha return pci_eth_init(bis); 1229d044fcbSPrabhakar Kushwaha } 1239d044fcbSPrabhakar Kushwaha 1249d044fcbSPrabhakar Kushwaha #ifdef CONFIG_OF_BOARD_SETUP 1259d044fcbSPrabhakar Kushwaha int ft_board_setup(void *blob, bd_t *bd) 1269d044fcbSPrabhakar Kushwaha { 1279d044fcbSPrabhakar Kushwaha arch_fixup_fdt(blob); 1289d044fcbSPrabhakar Kushwaha 1299d044fcbSPrabhakar Kushwaha ft_cpu_setup(blob, bd); 1309d044fcbSPrabhakar Kushwaha 1319d044fcbSPrabhakar Kushwaha return 0; 1329d044fcbSPrabhakar Kushwaha } 1339d044fcbSPrabhakar Kushwaha #endif 134