1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright 2016 Freescale Semiconductor, Inc.
4  */
5 
6 #include <common.h>
7 #include <i2c.h>
8 #include <asm/io.h>
9 #include <asm/arch/clock.h>
10 #include <asm/arch/fsl_serdes.h>
11 #ifdef CONFIG_FSL_LS_PPA
12 #include <asm/arch/ppa.h>
13 #endif
14 #include <asm/arch/mmu.h>
15 #include <asm/arch/soc.h>
16 #include <hwconfig.h>
17 #include <environment.h>
18 #include <fsl_mmdc.h>
19 #include <netdev.h>
20 
21 DECLARE_GLOBAL_DATA_PTR;
22 
23 int checkboard(void)
24 {
25 	puts("Board: LS1012AFRDM ");
26 
27 	return 0;
28 }
29 
30 int dram_init(void)
31 {
32 	static const struct fsl_mmdc_info mparam = {
33 		0x04180000,	/* mdctl */
34 		0x00030035,	/* mdpdc */
35 		0x12554000,	/* mdotc */
36 		0xbabf7954,	/* mdcfg0 */
37 		0xdb328f64,	/* mdcfg1 */
38 		0x01ff00db,	/* mdcfg2 */
39 		0x00001680,	/* mdmisc */
40 		0x0f3c8000,	/* mdref */
41 		0x00002000,	/* mdrwd */
42 		0x00bf1023,	/* mdor */
43 		0x0000003f,	/* mdasp */
44 		0x0000022a,	/* mpodtctrl */
45 		0xa1390003,	/* mpzqhwctrl */
46 	};
47 
48 	mmdc_init(&mparam);
49 
50 	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
51 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
52 	/* This will break-before-make MMU for DDR */
53 	update_early_mmu_table();
54 #endif
55 
56 	return 0;
57 }
58 
59 int board_early_init_f(void)
60 {
61 	fsl_lsch2_early_init_f();
62 
63 	return 0;
64 }
65 
66 int board_init(void)
67 {
68 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR +
69 					CONFIG_SYS_CCI400_OFFSET);
70 
71 	/*
72 	 * Set CCI-400 control override register to enable barrier
73 	 * transaction
74 	 */
75 	out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
76 
77 #ifdef CONFIG_ENV_IS_NOWHERE
78 	gd->env_addr = (ulong)&default_environment[0];
79 #endif
80 
81 #ifdef CONFIG_FSL_LS_PPA
82 	ppa_init();
83 #endif
84 	return 0;
85 }
86 
87 int ft_board_setup(void *blob, bd_t *bd)
88 {
89 	arch_fixup_fdt(blob);
90 
91 	ft_cpu_setup(blob, bd);
92 
93 	return 0;
94 }
95