1Overview
2--------
3QorIQ LS1012A FREEDOM (LS1012AFRDM) is a high-performance development
4platform, with a complete debugging environment. The LS1012AFRDM board
5supports the QorIQ LS1012A processor and is optimized to support the
6high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports.
7
8LS1012A SoC Overview
9--------------------
10Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A
11SoC overview.
12
13 LS1012AFRDM board Overview
14 -----------------------
15 - SERDES Connections, 2 lanes supportingspeeds upto 1 Gbit/s
16     - 2 SGMII 1G PHYs
17 - DDR Controller
18     - 4 Gb DDR3L SDRAM memory, running at data rates up to 1 GT/s
19	operating at 1.35 V
20 - QSPI
21     - Onboard 512 Mbit QSPI flash memory running at speed up
22      to 108/54 MHz
23 - One high-speed USB 2.0/3.0 port, one USB 2.0 port
24     - USB 2.0/3.0 port is configured as On-The-Go (OTG) with a
25       Micro-AB connector.
26     - USB 2.0 port is a debug port (CMSIS DAP) and is configured
27       as a Micro-AB device.
28 - I2C controller
29     - One I2C bus with connectivity to Arduino headers
30 - UART
31     - UART (Console): UART1 (Without flow control) for console
32 - ARM JTAG support
33     - ARM Cortex® 10-pin JTAG connector for LS1012A
34     - CMSIS DAP through K20 microcontroller
35 - SAI Audio interface
36     - One SAI port, SAI 2 with full duplex support
37 - Clocks
38     - 25 MHz crystal for LS1012A
39     - 8 MHz Crystal for K20
40     - 24 MHz for SC16IS740IPW SPI to Dual UART bridge
41 - Power Supplies
42     - 5 V input supply from USB
43     - 0.9 V, 1.35 V, and 1.8 V for VDD/Core, DDR, I/O, and
44       other board interfaces
45
46Booting Options
47---------------
48QSPI Flash 1
49
50QSPI flash map
51--------------
52Images		| Size	|QSPI Flash Address
53------------------------------------------
54RCW + PBI	| 1MB	| 0x4000_0000
55U-boot 		| 1MB	| 0x4010_0000
56U-boot Env 	| 1MB	| 0x4020_0000
57PPA FIT image	| 2MB	| 0x4050_0000
58Linux ITB	| ~53MB | 0x40A0_0000
59