xref: /openbmc/u-boot/board/freescale/common/vid.c (revision 224f7452)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright 2014 Freescale Semiconductor, Inc.
4  */
5 
6 #include <common.h>
7 #include <command.h>
8 #include <i2c.h>
9 #include <asm/io.h>
10 #ifdef CONFIG_FSL_LSCH2
11 #include <asm/arch/immap_lsch2.h>
12 #elif defined(CONFIG_FSL_LSCH3)
13 #include <asm/arch/immap_lsch3.h>
14 #else
15 #include <asm/immap_85xx.h>
16 #endif
17 #include "vid.h"
18 
19 int __weak i2c_multiplexer_select_vid_channel(u8 channel)
20 {
21 	return 0;
22 }
23 
24 /*
25  * Compensate for a board specific voltage drop between regulator and SoC
26  * return a value in mV
27  */
28 int __weak board_vdd_drop_compensation(void)
29 {
30 	return 0;
31 }
32 
33 /*
34  * Board specific settings for specific voltage value
35  */
36 int __weak board_adjust_vdd(int vdd)
37 {
38 	return 0;
39 }
40 
41 #if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
42 	defined(CONFIG_VOL_MONITOR_IR36021_READ)
43 /*
44  * Get the i2c address configuration for the IR regulator chip
45  *
46  * There are some variance in the RDB HW regarding the I2C address configuration
47  * for the IR regulator chip, which is likely a problem of external resistor
48  * accuracy. So we just check each address in a hopefully non-intrusive mode
49  * and use the first one that seems to work
50  *
51  * The IR chip can show up under the following addresses:
52  * 0x08 (Verified on T1040RDB-PA,T4240RDB-PB,X-T4240RDB-16GPA)
53  * 0x09 (Verified on T1040RDB-PA)
54  * 0x38 (Verified on T2080QDS, T2081QDS, T4240RDB)
55  */
56 static int find_ir_chip_on_i2c(void)
57 {
58 	int i2caddress;
59 	int ret;
60 	u8 byte;
61 	int i;
62 	const int ir_i2c_addr[] = {0x38, 0x08, 0x09};
63 
64 	/* Check all the address */
65 	for (i = 0; i < (sizeof(ir_i2c_addr)/sizeof(ir_i2c_addr[0])); i++) {
66 		i2caddress = ir_i2c_addr[i];
67 		ret = i2c_read(i2caddress,
68 			       IR36021_MFR_ID_OFFSET, 1, (void *)&byte,
69 			       sizeof(byte));
70 		if ((ret >= 0) && (byte == IR36021_MFR_ID))
71 			return i2caddress;
72 	}
73 	return -1;
74 }
75 #endif
76 
77 /* Maximum loop count waiting for new voltage to take effect */
78 #define MAX_LOOP_WAIT_NEW_VOL		100
79 /* Maximum loop count waiting for the voltage to be stable */
80 #define MAX_LOOP_WAIT_VOL_STABLE	100
81 /*
82  * read_voltage from sensor on I2C bus
83  * We use average of 4 readings, waiting for WAIT_FOR_ADC before
84  * another reading
85  */
86 #define NUM_READINGS    4       /* prefer to be power of 2 for efficiency */
87 
88 /* If an INA220 chip is available, we can use it to read back the voltage
89  * as it may have a higher accuracy than the IR chip for the same purpose
90  */
91 #ifdef CONFIG_VOL_MONITOR_INA220
92 #define WAIT_FOR_ADC	532	/* wait for 532 microseconds for ADC */
93 #define ADC_MIN_ACCURACY	4
94 #else
95 #define WAIT_FOR_ADC	138	/* wait for 138 microseconds for ADC */
96 #define ADC_MIN_ACCURACY	4
97 #endif
98 
99 #ifdef CONFIG_VOL_MONITOR_INA220
100 static int read_voltage_from_INA220(int i2caddress)
101 {
102 	int i, ret, voltage_read = 0;
103 	u16 vol_mon;
104 	u8 buf[2];
105 
106 	for (i = 0; i < NUM_READINGS; i++) {
107 		ret = i2c_read(I2C_VOL_MONITOR_ADDR,
108 			       I2C_VOL_MONITOR_BUS_V_OFFSET, 1,
109 			       (void *)&buf, 2);
110 		if (ret) {
111 			printf("VID: failed to read core voltage\n");
112 			return ret;
113 		}
114 		vol_mon = (buf[0] << 8) | buf[1];
115 		if (vol_mon & I2C_VOL_MONITOR_BUS_V_OVF) {
116 			printf("VID: Core voltage sensor error\n");
117 			return -1;
118 		}
119 		debug("VID: bus voltage reads 0x%04x\n", vol_mon);
120 		/* LSB = 4mv */
121 		voltage_read += (vol_mon >> I2C_VOL_MONITOR_BUS_V_SHIFT) * 4;
122 		udelay(WAIT_FOR_ADC);
123 	}
124 	/* calculate the average */
125 	voltage_read /= NUM_READINGS;
126 
127 	return voltage_read;
128 }
129 #endif
130 
131 /* read voltage from IR */
132 #ifdef CONFIG_VOL_MONITOR_IR36021_READ
133 static int read_voltage_from_IR(int i2caddress)
134 {
135 	int i, ret, voltage_read = 0;
136 	u16 vol_mon;
137 	u8 buf;
138 
139 	for (i = 0; i < NUM_READINGS; i++) {
140 		ret = i2c_read(i2caddress,
141 			       IR36021_LOOP1_VOUT_OFFSET,
142 			       1, (void *)&buf, 1);
143 		if (ret) {
144 			printf("VID: failed to read vcpu\n");
145 			return ret;
146 		}
147 		vol_mon = buf;
148 		if (!vol_mon) {
149 			printf("VID: Core voltage sensor error\n");
150 			return -1;
151 		}
152 		debug("VID: bus voltage reads 0x%02x\n", vol_mon);
153 		/* Resolution is 1/128V. We scale up here to get 1/128mV
154 		 * and divide at the end
155 		 */
156 		voltage_read += vol_mon * 1000;
157 		udelay(WAIT_FOR_ADC);
158 	}
159 	/* Scale down to the real mV as IR resolution is 1/128V, rounding up */
160 	voltage_read = DIV_ROUND_UP(voltage_read, 128);
161 
162 	/* calculate the average */
163 	voltage_read /= NUM_READINGS;
164 
165 	/* Compensate for a board specific voltage drop between regulator and
166 	 * SoC before converting into an IR VID value
167 	 */
168 	voltage_read -= board_vdd_drop_compensation();
169 
170 	return voltage_read;
171 }
172 #endif
173 
174 #ifdef CONFIG_VOL_MONITOR_LTC3882_READ
175 /* read the current value of the LTC Regulator Voltage */
176 static int read_voltage_from_LTC(int i2caddress)
177 {
178 	int  ret, vcode = 0;
179 	u8 chan = PWM_CHANNEL0;
180 
181 	/* select the PAGE 0 using PMBus commands PAGE for VDD*/
182 	ret = i2c_write(I2C_VOL_MONITOR_ADDR,
183 			PMBUS_CMD_PAGE, 1, &chan, 1);
184 	if (ret) {
185 		printf("VID: failed to select VDD Page 0\n");
186 		return ret;
187 	}
188 
189 	/*read the output voltage using PMBus command READ_VOUT*/
190 	ret = i2c_read(I2C_VOL_MONITOR_ADDR,
191 		       PMBUS_CMD_READ_VOUT, 1, (void *)&vcode, 2);
192 	if (ret) {
193 		printf("VID: failed to read the volatge\n");
194 		return ret;
195 	}
196 
197 	/* Scale down to the real mV as LTC resolution is 1/4096V,rounding up */
198 	vcode = DIV_ROUND_UP(vcode * 1000, 4096);
199 
200 	return vcode;
201 }
202 #endif
203 
204 static int read_voltage(int i2caddress)
205 {
206 	int voltage_read;
207 #ifdef CONFIG_VOL_MONITOR_INA220
208 	voltage_read = read_voltage_from_INA220(i2caddress);
209 #elif defined CONFIG_VOL_MONITOR_IR36021_READ
210 	voltage_read = read_voltage_from_IR(i2caddress);
211 #elif defined CONFIG_VOL_MONITOR_LTC3882_READ
212 	voltage_read = read_voltage_from_LTC(i2caddress);
213 #else
214 	return -1;
215 #endif
216 	return voltage_read;
217 }
218 
219 #ifdef CONFIG_VOL_MONITOR_IR36021_SET
220 /*
221  * We need to calculate how long before the voltage stops to drop
222  * or increase. It returns with the loop count. Each loop takes
223  * several readings (WAIT_FOR_ADC)
224  */
225 static int wait_for_new_voltage(int vdd, int i2caddress)
226 {
227 	int timeout, vdd_current;
228 
229 	vdd_current = read_voltage(i2caddress);
230 	/* wait until voltage starts to reach the target. Voltage slew
231 	 * rates by typical regulators will always lead to stable readings
232 	 * within each fairly long ADC interval in comparison to the
233 	 * intended voltage delta change until the target voltage is
234 	 * reached. The fairly small voltage delta change to any target
235 	 * VID voltage also means that this function will always complete
236 	 * within few iterations. If the timeout was ever reached, it would
237 	 * point to a serious failure in the regulator system.
238 	 */
239 	for (timeout = 0;
240 	     abs(vdd - vdd_current) > (IR_VDD_STEP_UP + IR_VDD_STEP_DOWN) &&
241 	     timeout < MAX_LOOP_WAIT_NEW_VOL; timeout++) {
242 		vdd_current = read_voltage(i2caddress);
243 	}
244 	if (timeout >= MAX_LOOP_WAIT_NEW_VOL) {
245 		printf("VID: Voltage adjustment timeout\n");
246 		return -1;
247 	}
248 	return timeout;
249 }
250 
251 /*
252  * this function keeps reading the voltage until it is stable or until the
253  * timeout expires
254  */
255 static int wait_for_voltage_stable(int i2caddress)
256 {
257 	int timeout, vdd_current, vdd;
258 
259 	vdd = read_voltage(i2caddress);
260 	udelay(NUM_READINGS * WAIT_FOR_ADC);
261 
262 	/* wait until voltage is stable */
263 	vdd_current = read_voltage(i2caddress);
264 	/* The maximum timeout is
265 	 * MAX_LOOP_WAIT_VOL_STABLE * NUM_READINGS * WAIT_FOR_ADC
266 	 */
267 	for (timeout = MAX_LOOP_WAIT_VOL_STABLE;
268 	     abs(vdd - vdd_current) > ADC_MIN_ACCURACY &&
269 	     timeout > 0; timeout--) {
270 		vdd = vdd_current;
271 		udelay(NUM_READINGS * WAIT_FOR_ADC);
272 		vdd_current = read_voltage(i2caddress);
273 	}
274 	if (timeout == 0)
275 		return -1;
276 	return vdd_current;
277 }
278 
279 /* Set the voltage to the IR chip */
280 static int set_voltage_to_IR(int i2caddress, int vdd)
281 {
282 	int wait, vdd_last;
283 	int ret;
284 	u8 vid;
285 
286 	/* Compensate for a board specific voltage drop between regulator and
287 	 * SoC before converting into an IR VID value
288 	 */
289 	vdd += board_vdd_drop_compensation();
290 #ifdef CONFIG_FSL_LSCH2
291 	vid = DIV_ROUND_UP(vdd - 265, 5);
292 #else
293 	vid = DIV_ROUND_UP(vdd - 245, 5);
294 #endif
295 
296 	ret = i2c_write(i2caddress, IR36021_LOOP1_MANUAL_ID_OFFSET,
297 			1, (void *)&vid, sizeof(vid));
298 	if (ret) {
299 		printf("VID: failed to write VID\n");
300 		return -1;
301 	}
302 	wait = wait_for_new_voltage(vdd, i2caddress);
303 	if (wait < 0)
304 		return -1;
305 	debug("VID: Waited %d us\n", wait * NUM_READINGS * WAIT_FOR_ADC);
306 
307 	vdd_last = wait_for_voltage_stable(i2caddress);
308 	if (vdd_last < 0)
309 		return -1;
310 	debug("VID: Current voltage is %d mV\n", vdd_last);
311 	return vdd_last;
312 }
313 
314 #endif
315 
316 #ifdef CONFIG_VOL_MONITOR_LTC3882_SET
317 /* this function sets the VDD and returns the value set */
318 static int set_voltage_to_LTC(int i2caddress, int vdd)
319 {
320 	int ret, vdd_last, vdd_target = vdd;
321 	int count = 100, temp = 0;
322 
323 	/* Scale up to the LTC resolution is 1/4096V */
324 	vdd = (vdd * 4096) / 1000;
325 
326 	/* 5-byte buffer which needs to be sent following the
327 	 * PMBus command PAGE_PLUS_WRITE.
328 	 */
329 	u8 buff[5] = {0x04, PWM_CHANNEL0, PMBUS_CMD_VOUT_COMMAND,
330 			vdd & 0xFF, (vdd & 0xFF00) >> 8};
331 
332 	/* Write the desired voltage code to the regulator */
333 	ret = i2c_write(I2C_VOL_MONITOR_ADDR,
334 			PMBUS_CMD_PAGE_PLUS_WRITE, 1, (void *)&buff, 5);
335 	if (ret) {
336 		printf("VID: I2C failed to write to the volatge regulator\n");
337 		return -1;
338 	}
339 
340 	/* Wait for the volatge to get to the desired value */
341 	do {
342 		vdd_last = read_voltage_from_LTC(i2caddress);
343 		if (vdd_last < 0) {
344 			printf("VID: Couldn't read sensor abort VID adjust\n");
345 			return -1;
346 		}
347 		count--;
348 		temp = vdd_last - vdd_target;
349 	} while ((abs(temp) > 2)  && (count > 0));
350 
351 	return vdd_last;
352 }
353 #endif
354 
355 static int set_voltage(int i2caddress, int vdd)
356 {
357 	int vdd_last = -1;
358 
359 #ifdef CONFIG_VOL_MONITOR_IR36021_SET
360 	vdd_last = set_voltage_to_IR(i2caddress, vdd);
361 #elif defined CONFIG_VOL_MONITOR_LTC3882_SET
362 	vdd_last = set_voltage_to_LTC(i2caddress, vdd);
363 #else
364 	#error Specific voltage monitor must be defined
365 #endif
366 	return vdd_last;
367 }
368 
369 #ifdef CONFIG_FSL_LSCH3
370 int adjust_vdd(ulong vdd_override)
371 {
372 	int re_enable = disable_interrupts();
373 	struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
374 	u32 fusesr;
375 #if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
376 	defined(CONFIG_VOL_MONITOR_IR36021_READ)
377 	u8 vid, buf;
378 #else
379 	u8 vid;
380 #endif
381 	int vdd_target, vdd_current, vdd_last;
382 	int ret, i2caddress;
383 	unsigned long vdd_string_override;
384 	char *vdd_string;
385 #ifdef CONFIG_ARCH_LX2160A
386 	static const u16 vdd[32] = {
387 		8250,
388 		7875,
389 		7750,
390 		0,      /* reserved */
391 		0,      /* reserved */
392 		0,      /* reserved */
393 		0,      /* reserved */
394 		0,      /* reserved */
395 		0,      /* reserved */
396 		0,      /* reserved */
397 		0,      /* reserved */
398 		0,      /* reserved */
399 		0,      /* reserved */
400 		0,      /* reserved */
401 		0,      /* reserved */
402 		0,      /* reserved */
403 		8000,
404 		8125,
405 		8250,
406 		0,      /* reserved */
407 		8500,
408 		0,      /* reserved */
409 		0,      /* reserved */
410 		0,      /* reserved */
411 		0,      /* reserved */
412 		0,      /* reserved */
413 		0,      /* reserved */
414 		0,      /* reserved */
415 		0,      /* reserved */
416 		0,      /* reserved */
417 		0,      /* reserved */
418 		0,      /* reserved */
419 	};
420 #else
421 #ifdef CONFIG_ARCH_LS1088A
422 	static const uint16_t vdd[32] = {
423 		10250,
424 		9875,
425 		9750,
426 		0,      /* reserved */
427 		0,      /* reserved */
428 		0,      /* reserved */
429 		0,      /* reserved */
430 		0,      /* reserved */
431 		9000,
432 		0,      /* reserved */
433 		0,      /* reserved */
434 		0,      /* reserved */
435 		0,      /* reserved */
436 		0,      /* reserved */
437 		0,      /* reserved */
438 		0,      /* reserved */
439 		10000,  /* 1.0000V */
440 		10125,
441 		10250,
442 		0,      /* reserved */
443 		0,      /* reserved */
444 		0,      /* reserved */
445 		0,      /* reserved */
446 		0,      /* reserved */
447 		0,      /* reserved */
448 		0,      /* reserved */
449 		0,      /* reserved */
450 		0,      /* reserved */
451 		0,      /* reserved */
452 		0,      /* reserved */
453 		0,      /* reserved */
454 		0,      /* reserved */
455 	};
456 
457 #else
458 	static const uint16_t vdd[32] = {
459 		10500,
460 		0,      /* reserved */
461 		9750,
462 		0,      /* reserved */
463 		9500,
464 		0,      /* reserved */
465 		0,      /* reserved */
466 		0,      /* reserved */
467 		0,      /* reserved */
468 		0,      /* reserved */
469 		0,      /* reserved */
470 		9000,      /* reserved */
471 		0,      /* reserved */
472 		0,      /* reserved */
473 		0,      /* reserved */
474 		0,      /* reserved */
475 		10000,  /* 1.0000V */
476 		0,      /* reserved */
477 		10250,
478 		0,      /* reserved */
479 		10500,
480 		0,      /* reserved */
481 		0,      /* reserved */
482 		0,      /* reserved */
483 		0,      /* reserved */
484 		0,      /* reserved */
485 		0,      /* reserved */
486 		0,      /* reserved */
487 		0,      /* reserved */
488 		0,      /* reserved */
489 		0,      /* reserved */
490 		0,      /* reserved */
491 	};
492 #endif
493 #endif
494 	struct vdd_drive {
495 		u8 vid;
496 		unsigned voltage;
497 	};
498 
499 	ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR);
500 	if (ret) {
501 		debug("VID: I2C failed to switch channel\n");
502 		ret = -1;
503 		goto exit;
504 	}
505 #if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
506 	defined(CONFIG_VOL_MONITOR_IR36021_READ)
507 	ret = find_ir_chip_on_i2c();
508 	if (ret < 0) {
509 		printf("VID: Could not find voltage regulator on I2C.\n");
510 		ret = -1;
511 		goto exit;
512 	} else {
513 		i2caddress = ret;
514 		debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress);
515 	}
516 
517 	/* check IR chip work on Intel mode*/
518 	ret = i2c_read(i2caddress,
519 		       IR36021_INTEL_MODE_OOFSET,
520 		       1, (void *)&buf, 1);
521 	if (ret) {
522 		printf("VID: failed to read IR chip mode.\n");
523 		ret = -1;
524 		goto exit;
525 	}
526 	if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) {
527 		printf("VID: IR Chip is not used in Intel mode.\n");
528 		ret = -1;
529 		goto exit;
530 	}
531 #endif
532 
533 	/* get the voltage ID from fuse status register */
534 	fusesr = in_le32(&gur->dcfg_fusesr);
535 	vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT) &
536 		FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK;
537 	if ((vid == 0) || (vid == FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK)) {
538 		vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT) &
539 			FSL_CHASSIS3_DCFG_FUSESR_VID_MASK;
540 	}
541 	vdd_target = vdd[vid];
542 
543 	/* check override variable for overriding VDD */
544 	vdd_string = env_get(CONFIG_VID_FLS_ENV);
545 	if (vdd_override == 0 && vdd_string &&
546 	    !strict_strtoul(vdd_string, 10, &vdd_string_override))
547 		vdd_override = vdd_string_override;
548 
549 	if (vdd_override >= VDD_MV_MIN && vdd_override <= VDD_MV_MAX) {
550 		vdd_target = vdd_override * 10; /* convert to 1/10 mV */
551 		debug("VDD override is %lu\n", vdd_override);
552 	} else if (vdd_override != 0) {
553 		printf("Invalid value.\n");
554 	}
555 
556 	/* divide and round up by 10 to get a value in mV */
557 	vdd_target = DIV_ROUND_UP(vdd_target, 10);
558 	if (vdd_target == 0) {
559 		debug("VID: VID not used\n");
560 		ret = 0;
561 		goto exit;
562 	} else if (vdd_target < VDD_MV_MIN || vdd_target > VDD_MV_MAX) {
563 		/* Check vdd_target is in valid range */
564 		printf("VID: Target VID %d mV is not in range.\n",
565 		       vdd_target);
566 		ret = -1;
567 		goto exit;
568 	} else {
569 		debug("VID: vid = %d mV\n", vdd_target);
570 	}
571 
572 	/*
573 	 * Read voltage monitor to check real voltage.
574 	 */
575 	vdd_last = read_voltage(i2caddress);
576 	if (vdd_last < 0) {
577 		printf("VID: Couldn't read sensor abort VID adjustment\n");
578 		ret = -1;
579 		goto exit;
580 	}
581 	vdd_current = vdd_last;
582 	debug("VID: Core voltage is currently at %d mV\n", vdd_last);
583 
584 #ifdef CONFIG_VOL_MONITOR_LTC3882_SET
585 	/* Set the target voltage */
586 	vdd_last = vdd_current = set_voltage(i2caddress, vdd_target);
587 #else
588 	/*
589 	  * Adjust voltage to at or one step above target.
590 	  * As measurements are less precise than setting the values
591 	  * we may run through dummy steps that cancel each other
592 	  * when stepping up and then down.
593 	  */
594 	while (vdd_last > 0 &&
595 	       vdd_last < vdd_target) {
596 		vdd_current += IR_VDD_STEP_UP;
597 		vdd_last = set_voltage(i2caddress, vdd_current);
598 	}
599 	while (vdd_last > 0 &&
600 	       vdd_last > vdd_target + (IR_VDD_STEP_DOWN - 1)) {
601 		vdd_current -= IR_VDD_STEP_DOWN;
602 		vdd_last = set_voltage(i2caddress, vdd_current);
603 	}
604 
605 #endif
606 	if (board_adjust_vdd(vdd_target) < 0) {
607 		ret = -1;
608 		goto exit;
609 	}
610 
611 	if (vdd_last > 0)
612 		printf("VID: Core voltage after adjustment is at %d mV\n",
613 		       vdd_last);
614 	else
615 		ret = -1;
616 exit:
617 	if (re_enable)
618 		enable_interrupts();
619 	i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT);
620 	return ret;
621 }
622 #else /* !CONFIG_FSL_LSCH3 */
623 int adjust_vdd(ulong vdd_override)
624 {
625 	int re_enable = disable_interrupts();
626 #if defined(CONFIG_FSL_LSCH2)
627 	struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
628 #else
629 	ccsr_gur_t __iomem *gur =
630 		(void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
631 #endif
632 	u32 fusesr;
633 	u8 vid, buf;
634 	int vdd_target, vdd_current, vdd_last;
635 	int ret, i2caddress;
636 	unsigned long vdd_string_override;
637 	char *vdd_string;
638 	static const uint16_t vdd[32] = {
639 		0,      /* unused */
640 		9875,   /* 0.9875V */
641 		9750,
642 		9625,
643 		9500,
644 		9375,
645 		9250,
646 		9125,
647 		9000,
648 		8875,
649 		8750,
650 		8625,
651 		8500,
652 		8375,
653 		8250,
654 		8125,
655 		10000,  /* 1.0000V */
656 		10125,
657 		10250,
658 		10375,
659 		10500,
660 		10625,
661 		10750,
662 		10875,
663 		11000,
664 		0,      /* reserved */
665 	};
666 	struct vdd_drive {
667 		u8 vid;
668 		unsigned voltage;
669 	};
670 
671 	ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR);
672 	if (ret) {
673 		debug("VID: I2C failed to switch channel\n");
674 		ret = -1;
675 		goto exit;
676 	}
677 #if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
678 	defined(CONFIG_VOL_MONITOR_IR36021_READ)
679 	ret = find_ir_chip_on_i2c();
680 	if (ret < 0) {
681 		printf("VID: Could not find voltage regulator on I2C.\n");
682 		ret = -1;
683 		goto exit;
684 	} else {
685 		i2caddress = ret;
686 		debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress);
687 	}
688 
689 	/* check IR chip work on Intel mode*/
690 	ret = i2c_read(i2caddress,
691 		       IR36021_INTEL_MODE_OOFSET,
692 		       1, (void *)&buf, 1);
693 	if (ret) {
694 		printf("VID: failed to read IR chip mode.\n");
695 		ret = -1;
696 		goto exit;
697 	}
698 	if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) {
699 		printf("VID: IR Chip is not used in Intel mode.\n");
700 		ret = -1;
701 		goto exit;
702 	}
703 #endif
704 
705 	/* get the voltage ID from fuse status register */
706 	fusesr = in_be32(&gur->dcfg_fusesr);
707 	/*
708 	 * VID is used according to the table below
709 	 *                ---------------------------------------
710 	 *                |                DA_V                 |
711 	 *                |-------------------------------------|
712 	 *                | 5b00000 | 5b00001-5b11110 | 5b11111 |
713 	 * ---------------+---------+-----------------+---------|
714 	 * | D | 5b00000  | NO VID  | VID = DA_V      | NO VID  |
715 	 * | A |----------+---------+-----------------+---------|
716 	 * | _ | 5b00001  |VID =    | VID =           |VID =    |
717 	 * | V |   ~      | DA_V_ALT|   DA_V_ALT      | DA_A_VLT|
718 	 * | _ | 5b11110  |         |                 |         |
719 	 * | A |----------+---------+-----------------+---------|
720 	 * | L | 5b11111  | No VID  | VID = DA_V      | NO VID  |
721 	 * | T |          |         |                 |         |
722 	 * ------------------------------------------------------
723 	 */
724 #ifdef CONFIG_FSL_LSCH2
725 	vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_ALTVID_SHIFT) &
726 		FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK;
727 	if ((vid == 0) || (vid == FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK)) {
728 		vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_VID_SHIFT) &
729 			FSL_CHASSIS2_DCFG_FUSESR_VID_MASK;
730 	}
731 #else
732 	vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) &
733 		FSL_CORENET_DCFG_FUSESR_ALTVID_MASK;
734 	if ((vid == 0) || (vid == FSL_CORENET_DCFG_FUSESR_ALTVID_MASK)) {
735 		vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_VID_SHIFT) &
736 			FSL_CORENET_DCFG_FUSESR_VID_MASK;
737 	}
738 #endif
739 	vdd_target = vdd[vid];
740 
741 	/* check override variable for overriding VDD */
742 	vdd_string = env_get(CONFIG_VID_FLS_ENV);
743 	if (vdd_override == 0 && vdd_string &&
744 	    !strict_strtoul(vdd_string, 10, &vdd_string_override))
745 		vdd_override = vdd_string_override;
746 	if (vdd_override >= VDD_MV_MIN && vdd_override <= VDD_MV_MAX) {
747 		vdd_target = vdd_override * 10; /* convert to 1/10 mV */
748 		debug("VDD override is %lu\n", vdd_override);
749 	} else if (vdd_override != 0) {
750 		printf("Invalid value.\n");
751 	}
752 	if (vdd_target == 0) {
753 		debug("VID: VID not used\n");
754 		ret = 0;
755 		goto exit;
756 	} else {
757 		/* divide and round up by 10 to get a value in mV */
758 		vdd_target = DIV_ROUND_UP(vdd_target, 10);
759 		debug("VID: vid = %d mV\n", vdd_target);
760 	}
761 
762 	/*
763 	 * Read voltage monitor to check real voltage.
764 	 */
765 	vdd_last = read_voltage(i2caddress);
766 	if (vdd_last < 0) {
767 		printf("VID: Couldn't read sensor abort VID adjustment\n");
768 		ret = -1;
769 		goto exit;
770 	}
771 	vdd_current = vdd_last;
772 	debug("VID: Core voltage is currently at %d mV\n", vdd_last);
773 	/*
774 	  * Adjust voltage to at or one step above target.
775 	  * As measurements are less precise than setting the values
776 	  * we may run through dummy steps that cancel each other
777 	  * when stepping up and then down.
778 	  */
779 	while (vdd_last > 0 &&
780 	       vdd_last < vdd_target) {
781 		vdd_current += IR_VDD_STEP_UP;
782 		vdd_last = set_voltage(i2caddress, vdd_current);
783 	}
784 	while (vdd_last > 0 &&
785 	       vdd_last > vdd_target + (IR_VDD_STEP_DOWN - 1)) {
786 		vdd_current -= IR_VDD_STEP_DOWN;
787 		vdd_last = set_voltage(i2caddress, vdd_current);
788 	}
789 
790 	if (vdd_last > 0)
791 		printf("VID: Core voltage after adjustment is at %d mV\n",
792 		       vdd_last);
793 	else
794 		ret = -1;
795 exit:
796 	if (re_enable)
797 		enable_interrupts();
798 
799 	i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT);
800 
801 	return ret;
802 }
803 #endif
804 
805 static int print_vdd(void)
806 {
807 	int vdd_last, ret, i2caddress;
808 
809 	ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR);
810 	if (ret) {
811 		debug("VID : I2c failed to switch channel\n");
812 		return -1;
813 	}
814 #if defined(CONFIG_VOL_MONITOR_IR36021_SET) || \
815 	defined(CONFIG_VOL_MONITOR_IR36021_READ)
816 	ret = find_ir_chip_on_i2c();
817 	if (ret < 0) {
818 		printf("VID: Could not find voltage regulator on I2C.\n");
819 		goto exit;
820 	} else {
821 		i2caddress = ret;
822 		debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress);
823 	}
824 #endif
825 
826 	/*
827 	 * Read voltage monitor to check real voltage.
828 	 */
829 	vdd_last = read_voltage(i2caddress);
830 	if (vdd_last < 0) {
831 		printf("VID: Couldn't read sensor abort VID adjustment\n");
832 		goto exit;
833 	}
834 	printf("VID: Core voltage is at %d mV\n", vdd_last);
835 exit:
836 	i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT);
837 
838 	return ret < 0 ? -1 : 0;
839 
840 }
841 
842 static int do_vdd_override(cmd_tbl_t *cmdtp,
843 			   int flag, int argc,
844 			   char * const argv[])
845 {
846 	ulong override;
847 
848 	if (argc < 2)
849 		return CMD_RET_USAGE;
850 
851 	if (!strict_strtoul(argv[1], 10, &override))
852 		adjust_vdd(override);   /* the value is checked by callee */
853 	else
854 		return CMD_RET_USAGE;
855 	return 0;
856 }
857 
858 static int do_vdd_read(cmd_tbl_t *cmdtp,
859 			 int flag, int argc,
860 			 char * const argv[])
861 {
862 	if (argc < 1)
863 		return CMD_RET_USAGE;
864 	print_vdd();
865 
866 	return 0;
867 }
868 
869 U_BOOT_CMD(
870 	vdd_override, 2, 0, do_vdd_override,
871 	"override VDD",
872 	" - override with the voltage specified in mV, eg. 1050"
873 );
874 
875 U_BOOT_CMD(
876 	vdd_read, 1, 0, do_vdd_read,
877 	"read VDD",
878 	" - Read the voltage specified in mV"
879 )
880