xref: /openbmc/u-boot/board/freescale/common/qixis.c (revision 1a3cb4ad)
1 /*
2  * Copyright 2011 Freescale Semiconductor
3  * Author: Shengzhou Liu <Shengzhou.Liu@freescale.com>
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License as published by the Free
7  * Software Foundation; either version 2 of the License, or (at your option)
8  * any later version.
9  *
10  * This file provides support for the QIXIS of some Freescale reference boards.
11  *
12  */
13 
14 #include <common.h>
15 #include <command.h>
16 #include <asm/io.h>
17 #include "qixis.h"
18 
19 u8 qixis_read(unsigned int reg)
20 {
21 	void *p = (void *)QIXIS_BASE;
22 
23 	return in_8(p + reg);
24 }
25 
26 void qixis_write(unsigned int reg, u8 value)
27 {
28 	void *p = (void *)QIXIS_BASE;
29 
30 	out_8(p + reg, value);
31 }
32 
33 void qixis_reset(void)
34 {
35 	QIXIS_WRITE(rst_ctl, 0x83);
36 }
37 
38 void qixis_bank_reset(void)
39 {
40 	QIXIS_WRITE(rcfg_ctl, 0x20);
41 	QIXIS_WRITE(rcfg_ctl, 0x21);
42 }
43 
44 /* Set the boot bank to the power-on default bank0 */
45 void clear_altbank(void)
46 {
47 	u8 reg;
48 
49 	reg = QIXIS_READ(brdcfg[0]);
50 	reg = reg & ~QIXIS_LBMAP_MASK;
51 	QIXIS_WRITE(brdcfg[0], reg);
52 }
53 
54 /* Set the boot bank to the alternate bank */
55 void set_altbank(void)
56 {
57 	u8 reg;
58 
59 	reg = QIXIS_READ(brdcfg[0]);
60 	reg = (reg & ~QIXIS_LBMAP_MASK) | QIXIS_LBMAP_ALTBANK;
61 	QIXIS_WRITE(brdcfg[0], reg);
62 }
63 
64 #ifdef DEBUG
65 static void qixis_dump_regs(void)
66 {
67 	int i;
68 
69 	printf("id	= %02x\n", QIXIS_READ(id));
70 	printf("arch	= %02x\n", QIXIS_READ(arch));
71 	printf("scver	= %02x\n", QIXIS_READ(scver));
72 	printf("model	= %02x\n", QIXIS_READ(model));
73 	printf("rst_ctl	= %02x\n", QIXIS_READ(rst_ctl));
74 	printf("aux	= %02x\n", QIXIS_READ(aux));
75 	for (i = 0; i < 16; i++)
76 		printf("brdcfg%02d = %02x\n", i, QIXIS_READ(brdcfg[i]));
77 	for (i = 0; i < 16; i++)
78 		printf("dutcfg%02d = %02x\n", i, QIXIS_READ(dutcfg[i]));
79 	printf("sclk	= %02x%02x%02x\n", QIXIS_READ(sclk[0]),
80 		QIXIS_READ(sclk[1]), QIXIS_READ(sclk[2]));
81 	printf("dclk	= %02x%02x%02x\n", QIXIS_READ(dclk[0]),
82 		QIXIS_READ(dclk[1]), QIXIS_READ(dclk[2]));
83 	printf("aux     = %02x\n", QIXIS_READ(aux));
84 	printf("watch	= %02x\n", QIXIS_READ(watch));
85 	printf("ctl_sys	= %02x\n", QIXIS_READ(ctl_sys));
86 	printf("rcw_ctl = %02x\n", QIXIS_READ(rcw_ctl));
87 	printf("present = %02x\n", QIXIS_READ(present));
88 	printf("clk_spd = %02x\n", QIXIS_READ(clk_spd));
89 	printf("stat_dut = %02x\n", QIXIS_READ(stat_dut));
90 	printf("stat_sys = %02x\n", QIXIS_READ(stat_sys));
91 	printf("stat_alrm = %02x\n", QIXIS_READ(stat_alrm));
92 	printf("ctl_sys2 = %02x\n", QIXIS_READ(ctl_sys2));
93 }
94 #endif
95 
96 int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
97 {
98 	int i;
99 
100 	if (argc <= 1) {
101 		clear_altbank();
102 		qixis_reset();
103 	} else if (strcmp(argv[1], "altbank") == 0) {
104 		set_altbank();
105 		qixis_bank_reset();
106 	} else if (strcmp(argv[1], "watchdog") == 0) {
107 		static char *period[9] = {"2s", "4s", "8s", "16s", "32s",
108 					  "1min", "2min", "4min", "8min"};
109 		u8 rcfg = QIXIS_READ(rcfg_ctl);
110 
111 		if (argv[2] == NULL) {
112 			printf("qixis watchdog <watchdog_period>\n");
113 			return 0;
114 		}
115 		for (i = 0; i < ARRAY_SIZE(period); i++) {
116 			if (strcmp(argv[2], period[i]) == 0) {
117 				/* disable watchdog */
118 				QIXIS_WRITE(rcfg_ctl, rcfg & ~0x08);
119 				QIXIS_WRITE(watch, ((i<<2) - 1));
120 				QIXIS_WRITE(rcfg_ctl, rcfg);
121 				return 0;
122 			}
123 		}
124 	}
125 
126 #ifdef DEBUG
127 	else if (strcmp(argv[1], "dump") == 0) {
128 		qixis_dump_regs();
129 		return 0;
130 	}
131 #endif
132 
133 	else {
134 		printf("Invalid option: %s\n", argv[1]);
135 		return 1;
136 	}
137 
138 	return 0;
139 }
140 
141 U_BOOT_CMD(
142 	qixis_reset, CONFIG_SYS_MAXARGS, 1, qixis_reset_cmd,
143 	"Reset the board using the FPGA sequencer",
144 	"- hard reset to default bank\n"
145 	"qixis_reset altbank - reset to alternate bank\n"
146 	"qixis watchdog <watchdog_period> - set the watchdog period\n"
147 	"	period: 1s 2s 4s 8s 16s 32s 1min 2min 4min 8min\n"
148 #ifdef DEBUG
149 	"qixis_reset dump - display the QIXIS registers\n"
150 #endif
151 	);
152