1 /* 2 * Copyright 2014 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <errno.h> 9 #include <power/pmic.h> 10 #include <power/pfuze100_pmic.h> 11 12 int pfuze_mode_init(struct pmic *p, u32 mode) 13 { 14 unsigned char offset, i, switch_num; 15 u32 id, ret; 16 17 pmic_reg_read(p, PFUZE100_DEVICEID, &id); 18 id = id & 0xf; 19 20 if (id == 0) { 21 switch_num = 6; 22 offset = PFUZE100_SW1CMODE; 23 } else if (id == 1) { 24 switch_num = 4; 25 offset = PFUZE100_SW2MODE; 26 } else { 27 printf("Not supported, id=%d\n", id); 28 return -EINVAL; 29 } 30 31 ret = pmic_reg_write(p, PFUZE100_SW1ABMODE, mode); 32 if (ret < 0) { 33 printf("Set SW1AB mode error!\n"); 34 return ret; 35 } 36 37 for (i = 0; i < switch_num - 1; i++) { 38 ret = pmic_reg_write(p, offset + i * SWITCH_SIZE, mode); 39 if (ret < 0) { 40 printf("Set switch 0x%x mode error!\n", 41 offset + i * SWITCH_SIZE); 42 return ret; 43 } 44 } 45 46 return ret; 47 } 48 49 struct pmic *pfuze_common_init(unsigned char i2cbus) 50 { 51 struct pmic *p; 52 int ret; 53 unsigned int reg; 54 55 ret = power_pfuze100_init(i2cbus); 56 if (ret) 57 return NULL; 58 59 p = pmic_get("PFUZE100"); 60 ret = pmic_probe(p); 61 if (ret) 62 return NULL; 63 64 pmic_reg_read(p, PFUZE100_DEVICEID, ®); 65 printf("PMIC: PFUZE100 ID=0x%02x\n", reg); 66 67 /* Set SW1AB stanby volage to 0.975V */ 68 pmic_reg_read(p, PFUZE100_SW1ABSTBY, ®); 69 reg &= ~SW1x_STBY_MASK; 70 reg |= SW1x_0_975V; 71 pmic_reg_write(p, PFUZE100_SW1ABSTBY, reg); 72 73 /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */ 74 pmic_reg_read(p, PFUZE100_SW1ABCONF, ®); 75 reg &= ~SW1xCONF_DVSSPEED_MASK; 76 reg |= SW1xCONF_DVSSPEED_4US; 77 pmic_reg_write(p, PFUZE100_SW1ABCONF, reg); 78 79 /* Set SW1C standby voltage to 0.975V */ 80 pmic_reg_read(p, PFUZE100_SW1CSTBY, ®); 81 reg &= ~SW1x_STBY_MASK; 82 reg |= SW1x_0_975V; 83 pmic_reg_write(p, PFUZE100_SW1CSTBY, reg); 84 85 /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */ 86 pmic_reg_read(p, PFUZE100_SW1CCONF, ®); 87 reg &= ~SW1xCONF_DVSSPEED_MASK; 88 reg |= SW1xCONF_DVSSPEED_4US; 89 pmic_reg_write(p, PFUZE100_SW1CCONF, reg); 90 91 return p; 92 } 93