1 /** 2 * Copyright 2010-2011 Freescale Semiconductor 3 * Author: Timur Tabi <timur@freescale.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 * 7 * This file provides support for the ngPIXIS, a board-specific FPGA used on 8 * some Freescale reference boards. 9 * 10 * A "switch" is black rectangular block on the motherboard. It contains 11 * eight "bits". The ngPIXIS has a set of memory-mapped registers (SWx) that 12 * shadow the actual physical switches. There is also another set of 13 * registers (ENx) that tell the ngPIXIS which bits of SWx should actually be 14 * used to override the values of the bits in the physical switches. 15 * 16 * The following macros need to be defined: 17 * 18 * PIXIS_BASE - The virtual address of the base of the PIXIS register map 19 * 20 * PIXIS_LBMAP_SWITCH - The switch number (i.e. the "x" in "SWx"). This value 21 * is used in the PIXIS_SW() macro to determine which offset in 22 * the PIXIS register map corresponds to the physical switch that controls 23 * the boot bank. 24 * 25 * PIXIS_LBMAP_MASK - A bit mask the defines which bits in SWx to use. 26 * 27 * PIXIS_LBMAP_SHIFT - The shift value that corresponds to PIXIS_LBMAP_MASK. 28 * 29 * PIXIS_LBMAP_ALTBANK - The value to program into SWx to tell the ngPIXIS to 30 * boot from the alternate bank. 31 */ 32 33 #include <common.h> 34 #include <command.h> 35 #include <asm/io.h> 36 37 #include "ngpixis.h" 38 39 static u8 __pixis_read(unsigned int reg) 40 { 41 void *p = (void *)PIXIS_BASE; 42 43 return in_8(p + reg); 44 } 45 u8 pixis_read(unsigned int reg) __attribute__((weak, alias("__pixis_read"))); 46 47 static void __pixis_write(unsigned int reg, u8 value) 48 { 49 void *p = (void *)PIXIS_BASE; 50 51 out_8(p + reg, value); 52 } 53 void pixis_write(unsigned int reg, u8 value) 54 __attribute__((weak, alias("__pixis_write"))); 55 56 /* 57 * Reset the board. This ignores the ENx registers. 58 */ 59 void __pixis_reset(void) 60 { 61 PIXIS_WRITE(rst, 0); 62 63 while (1); 64 } 65 void pixis_reset(void) __attribute__((weak, alias("__pixis_reset"))); 66 67 /* 68 * Reset the board. Like pixis_reset(), but it honors the ENx registers. 69 */ 70 void __pixis_bank_reset(void) 71 { 72 PIXIS_WRITE(vctl, 0); 73 PIXIS_WRITE(vctl, 1); 74 75 while (1); 76 } 77 void pixis_bank_reset(void) __attribute__((weak, alias("__pixis_bank_reset"))); 78 79 /** 80 * Set the boot bank to the power-on default bank 81 */ 82 void __clear_altbank(void) 83 { 84 u8 reg; 85 86 /* Tell the ngPIXIS to use this the bits in the physical switch for the 87 * boot bank value, instead of the SWx register. We need to be careful 88 * only to set the bits in SWx that correspond to the boot bank. 89 */ 90 reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en); 91 reg &= ~PIXIS_LBMAP_MASK; 92 PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg); 93 } 94 void clear_altbank(void) __attribute__((weak, alias("__clear_altbank"))); 95 96 /** 97 * Set the boot bank to the alternate bank 98 */ 99 void __set_altbank(void) 100 { 101 u8 reg; 102 103 /* Program the alternate bank number into the SWx register. 104 */ 105 reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].sw); 106 reg = (reg & ~PIXIS_LBMAP_MASK) | PIXIS_LBMAP_ALTBANK; 107 PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].sw, reg); 108 109 /* Tell the ngPIXIS to use this the bits in the SWx register for the 110 * boot bank value, instead of the physical switch. We need to be 111 * careful only to set the bits in SWx that correspond to the boot bank. 112 */ 113 reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en); 114 reg |= PIXIS_LBMAP_MASK; 115 PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg); 116 } 117 void set_altbank(void) __attribute__((weak, alias("__set_altbank"))); 118 119 #ifdef DEBUG 120 static void pixis_dump_regs(void) 121 { 122 unsigned int i; 123 124 printf("id=%02x\n", PIXIS_READ(id)); 125 printf("arch=%02x\n", PIXIS_READ(arch)); 126 printf("scver=%02x\n", PIXIS_READ(scver)); 127 printf("csr=%02x\n", PIXIS_READ(csr)); 128 printf("rst=%02x\n", PIXIS_READ(rst)); 129 printf("aux=%02x\n", PIXIS_READ(aux)); 130 printf("spd=%02x\n", PIXIS_READ(spd)); 131 printf("brdcfg0=%02x\n", PIXIS_READ(brdcfg0)); 132 printf("brdcfg1=%02x\n", PIXIS_READ(brdcfg1)); 133 printf("addr=%02x\n", PIXIS_READ(addr)); 134 printf("data=%02x\n", PIXIS_READ(data)); 135 printf("led=%02x\n", PIXIS_READ(led)); 136 printf("vctl=%02x\n", PIXIS_READ(vctl)); 137 printf("vstat=%02x\n", PIXIS_READ(vstat)); 138 printf("vcfgen0=%02x\n", PIXIS_READ(vcfgen0)); 139 printf("ocmcsr=%02x\n", PIXIS_READ(ocmcsr)); 140 printf("ocmmsg=%02x\n", PIXIS_READ(ocmmsg)); 141 printf("gmdbg=%02x\n", PIXIS_READ(gmdbg)); 142 printf("sclk=%02x%02x%02x\n", 143 PIXIS_READ(sclk[0]), PIXIS_READ(sclk[1]), PIXIS_READ(sclk[2])); 144 printf("dclk=%02x%02x%02x\n", 145 PIXIS_READ(dclk[0]), PIXIS_READ(dclk[1]), PIXIS_READ(dclk[2])); 146 printf("watch=%02x\n", PIXIS_READ(watch)); 147 148 for (i = 0; i < 8; i++) { 149 printf("SW%u=%02x/%02x ", i + 1, 150 PIXIS_READ(s[i].sw), PIXIS_READ(s[i].en)); 151 } 152 putc('\n'); 153 } 154 #endif 155 156 void pixis_sysclk_set(unsigned long sysclk) 157 { 158 unsigned long freq_word; 159 u8 sclk0, sclk1, sclk2; 160 161 freq_word = ics307_sysclk_calculator(sysclk); 162 sclk2 = freq_word & 0xff; 163 sclk1 = (freq_word >> 8) & 0xff; 164 sclk0 = (freq_word >> 16) & 0xff; 165 166 /* set SYSCLK enable bit */ 167 PIXIS_WRITE(vcfgen0, 0x01); 168 169 /* SYSCLK to required frequency */ 170 PIXIS_WRITE(sclk[0], sclk0); 171 PIXIS_WRITE(sclk[1], sclk1); 172 PIXIS_WRITE(sclk[2], sclk2); 173 } 174 175 int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 176 { 177 unsigned int i; 178 unsigned long sysclk; 179 char *p_altbank = NULL; 180 #ifdef DEBUG 181 char *p_dump = NULL; 182 #endif 183 char *unknown_param = NULL; 184 185 /* No args is a simple reset request. 186 */ 187 if (argc <= 1) 188 pixis_reset(); 189 190 for (i = 1; i < argc; i++) { 191 if (strcmp(argv[i], "altbank") == 0) { 192 p_altbank = argv[i]; 193 continue; 194 } 195 196 #ifdef DEBUG 197 if (strcmp(argv[i], "dump") == 0) { 198 p_dump = argv[i]; 199 continue; 200 } 201 #endif 202 if (strcmp(argv[i], "sysclk") == 0) { 203 sysclk = simple_strtoul(argv[i + 1], NULL, 0); 204 i += 1; 205 pixis_sysclk_set(sysclk); 206 continue; 207 } 208 209 unknown_param = argv[i]; 210 } 211 212 if (unknown_param) { 213 printf("Invalid option: %s\n", unknown_param); 214 return 1; 215 } 216 217 #ifdef DEBUG 218 if (p_dump) { 219 pixis_dump_regs(); 220 221 /* 'dump' ignores other commands */ 222 return 0; 223 } 224 #endif 225 226 if (p_altbank) 227 set_altbank(); 228 else 229 clear_altbank(); 230 231 pixis_bank_reset(); 232 233 /* Shouldn't be reached. */ 234 return 0; 235 } 236 237 #ifdef CONFIG_SYS_LONGHELP 238 static char pixis_help_text[] = 239 "- hard reset to default bank\n" 240 "pixis_reset altbank - reset to alternate bank\n" 241 #ifdef DEBUG 242 "pixis_reset dump - display the PIXIS registers\n" 243 #endif 244 "pixis_reset sysclk <SYSCLK_freq> - reset with SYSCLK frequency(KHz)\n"; 245 #endif 246 247 U_BOOT_CMD( 248 pixis_reset, CONFIG_SYS_MAXARGS, 1, pixis_reset_cmd, 249 "Reset the board using the FPGA sequencer", pixis_help_text 250 ); 251