1 /** 2 * Copyright 2010-2011 Freescale Semiconductor 3 * Author: Timur Tabi <timur@freescale.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License as published by the Free 7 * Software Foundation; either version 2 of the License, or (at your option) 8 * any later version. 9 * 10 * This file provides support for the ngPIXIS, a board-specific FPGA used on 11 * some Freescale reference boards. 12 * 13 * A "switch" is black rectangular block on the motherboard. It contains 14 * eight "bits". The ngPIXIS has a set of memory-mapped registers (SWx) that 15 * shadow the actual physical switches. There is also another set of 16 * registers (ENx) that tell the ngPIXIS which bits of SWx should actually be 17 * used to override the values of the bits in the physical switches. 18 * 19 * The following macros need to be defined: 20 * 21 * PIXIS_BASE - The virtual address of the base of the PIXIS register map 22 * 23 * PIXIS_LBMAP_SWITCH - The switch number (i.e. the "x" in "SWx"). This value 24 * is used in the PIXIS_SW() macro to determine which offset in 25 * the PIXIS register map corresponds to the physical switch that controls 26 * the boot bank. 27 * 28 * PIXIS_LBMAP_MASK - A bit mask the defines which bits in SWx to use. 29 * 30 * PIXIS_LBMAP_SHIFT - The shift value that corresponds to PIXIS_LBMAP_MASK. 31 * 32 * PIXIS_LBMAP_ALTBANK - The value to program into SWx to tell the ngPIXIS to 33 * boot from the alternate bank. 34 */ 35 36 #include <common.h> 37 #include <command.h> 38 #include <asm/io.h> 39 40 #include "ngpixis.h" 41 42 static u8 __pixis_read(unsigned int reg) 43 { 44 void *p = (void *)PIXIS_BASE; 45 46 return in_8(p + reg); 47 } 48 u8 pixis_read(unsigned int reg) __attribute__((weak, alias("__pixis_read"))); 49 50 static void __pixis_write(unsigned int reg, u8 value) 51 { 52 void *p = (void *)PIXIS_BASE; 53 54 out_8(p + reg, value); 55 } 56 void pixis_write(unsigned int reg, u8 value) 57 __attribute__((weak, alias("__pixis_write"))); 58 59 /* 60 * Reset the board. This ignores the ENx registers. 61 */ 62 void __pixis_reset(void) 63 { 64 PIXIS_WRITE(rst, 0); 65 66 while (1); 67 } 68 void pixis_reset(void) __attribute__((weak, alias("__pixis_reset"))); 69 70 /* 71 * Reset the board. Like pixis_reset(), but it honors the ENx registers. 72 */ 73 void __pixis_bank_reset(void) 74 { 75 PIXIS_WRITE(vctl, 0); 76 PIXIS_WRITE(vctl, 1); 77 78 while (1); 79 } 80 void pixis_bank_reset(void) __attribute__((weak, alias("__pixis_bank_reset"))); 81 82 /** 83 * Set the boot bank to the power-on default bank 84 */ 85 void __clear_altbank(void) 86 { 87 u8 reg; 88 89 /* Tell the ngPIXIS to use this the bits in the physical switch for the 90 * boot bank value, instead of the SWx register. We need to be careful 91 * only to set the bits in SWx that correspond to the boot bank. 92 */ 93 reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en); 94 reg &= ~PIXIS_LBMAP_MASK; 95 PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg); 96 } 97 void clear_altbank(void) __attribute__((weak, alias("__clear_altbank"))); 98 99 /** 100 * Set the boot bank to the alternate bank 101 */ 102 void __set_altbank(void) 103 { 104 u8 reg; 105 106 /* Program the alternate bank number into the SWx register. 107 */ 108 reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].sw); 109 reg = (reg & ~PIXIS_LBMAP_MASK) | PIXIS_LBMAP_ALTBANK; 110 PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].sw, reg); 111 112 /* Tell the ngPIXIS to use this the bits in the SWx register for the 113 * boot bank value, instead of the physical switch. We need to be 114 * careful only to set the bits in SWx that correspond to the boot bank. 115 */ 116 reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en); 117 reg |= PIXIS_LBMAP_MASK; 118 PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg); 119 } 120 void set_altbank(void) __attribute__((weak, alias("__set_altbank"))); 121 122 #ifdef DEBUG 123 static void pixis_dump_regs(void) 124 { 125 unsigned int i; 126 127 printf("id=%02x\n", PIXIS_READ(id)); 128 printf("arch=%02x\n", PIXIS_READ(arch)); 129 printf("scver=%02x\n", PIXIS_READ(scver)); 130 printf("csr=%02x\n", PIXIS_READ(csr)); 131 printf("rst=%02x\n", PIXIS_READ(rst)); 132 printf("aux=%02x\n", PIXIS_READ(aux)); 133 printf("spd=%02x\n", PIXIS_READ(spd)); 134 printf("brdcfg0=%02x\n", PIXIS_READ(brdcfg0)); 135 printf("brdcfg1=%02x\n", PIXIS_READ(brdcfg1)); 136 printf("addr=%02x\n", PIXIS_READ(addr)); 137 printf("data=%02x\n", PIXIS_READ(data)); 138 printf("led=%02x\n", PIXIS_READ(led)); 139 printf("vctl=%02x\n", PIXIS_READ(vctl)); 140 printf("vstat=%02x\n", PIXIS_READ(vstat)); 141 printf("vcfgen0=%02x\n", PIXIS_READ(vcfgen0)); 142 printf("ocmcsr=%02x\n", PIXIS_READ(ocmcsr)); 143 printf("ocmmsg=%02x\n", PIXIS_READ(ocmmsg)); 144 printf("gmdbg=%02x\n", PIXIS_READ(gmdbg)); 145 printf("sclk=%02x%02x%02x\n", 146 PIXIS_READ(sclk[0]), PIXIS_READ(sclk[1]), PIXIS_READ(sclk[2])); 147 printf("dclk=%02x%02x%02x\n", 148 PIXIS_READ(dclk[0]), PIXIS_READ(dclk[1]), PIXIS_READ(dclk[2])); 149 printf("watch=%02x\n", PIXIS_READ(watch)); 150 151 for (i = 0; i < 8; i++) { 152 printf("SW%u=%02x/%02x ", i + 1, 153 PIXIS_READ(s[i].sw), PIXIS_READ(s[i].en)); 154 } 155 putc('\n'); 156 } 157 #endif 158 159 int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 160 { 161 unsigned int i; 162 char *p_altbank = NULL; 163 #ifdef DEBUG 164 char *p_dump = NULL; 165 #endif 166 char *unknown_param = NULL; 167 168 /* No args is a simple reset request. 169 */ 170 if (argc <= 1) 171 pixis_reset(); 172 173 for (i = 1; i < argc; i++) { 174 if (strcmp(argv[i], "altbank") == 0) { 175 p_altbank = argv[i]; 176 continue; 177 } 178 179 #ifdef DEBUG 180 if (strcmp(argv[i], "dump") == 0) { 181 p_dump = argv[i]; 182 continue; 183 } 184 #endif 185 186 unknown_param = argv[i]; 187 } 188 189 if (unknown_param) { 190 printf("Invalid option: %s\n", unknown_param); 191 return 1; 192 } 193 194 #ifdef DEBUG 195 if (p_dump) { 196 pixis_dump_regs(); 197 198 /* 'dump' ignores other commands */ 199 return 0; 200 } 201 #endif 202 203 if (p_altbank) 204 set_altbank(); 205 else 206 clear_altbank(); 207 208 pixis_bank_reset(); 209 210 /* Shouldn't be reached. */ 211 return 0; 212 } 213 214 U_BOOT_CMD( 215 pixis_reset, CONFIG_SYS_MAXARGS, 1, pixis_reset_cmd, 216 "Reset the board using the FPGA sequencer", 217 "- hard reset to default bank\n" 218 "pixis_reset altbank - reset to alternate bank\n" 219 #ifdef DEBUG 220 "pixis_reset dump - display the PIXIS registers\n" 221 #endif 222 ); 223