10a6b2714SAneesh Bansal /* 20a6b2714SAneesh Bansal * Copyright 2015 Freescale Semiconductor, Inc. 30a6b2714SAneesh Bansal * 40a6b2714SAneesh Bansal * SPDX-License-Identifier: GPL-2.0+ 50a6b2714SAneesh Bansal */ 60a6b2714SAneesh Bansal 70a6b2714SAneesh Bansal #include <common.h> 80a6b2714SAneesh Bansal #include <fsl_validate.h> 98f01397bSSumit Garg #include <fsl_secboot_err.h> 100a6b2714SAneesh Bansal #include <fsl_sfp.h> 118f01397bSSumit Garg #include <dm/root.h> 128f01397bSSumit Garg 13028ac8c7SSumit Garg #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_FRAMEWORK) 14028ac8c7SSumit Garg #include <spl.h> 15028ac8c7SSumit Garg #endif 16028ac8c7SSumit Garg 178f01397bSSumit Garg #ifdef CONFIG_ADDR_MAP 188f01397bSSumit Garg #include <asm/mmu.h> 198f01397bSSumit Garg #endif 208f01397bSSumit Garg 218f01397bSSumit Garg #ifdef CONFIG_FSL_CORENET 228f01397bSSumit Garg #include <asm/fsl_pamu.h> 238f01397bSSumit Garg #endif 240a6b2714SAneesh Bansal 25*73fb5838SYork Sun #ifdef CONFIG_ARCH_LS1021A 260a6b2714SAneesh Bansal #include <asm/arch/immap_ls102xa.h> 270a6b2714SAneesh Bansal #endif 280a6b2714SAneesh Bansal 290a6b2714SAneesh Bansal #if defined(CONFIG_MPC85xx) 300a6b2714SAneesh Bansal #define CONFIG_DCFG_ADDR CONFIG_SYS_MPC85xx_GUTS_ADDR 310a6b2714SAneesh Bansal #else 320a6b2714SAneesh Bansal #define CONFIG_DCFG_ADDR CONFIG_SYS_FSL_GUTS_ADDR 330a6b2714SAneesh Bansal #endif 340a6b2714SAneesh Bansal 350a6b2714SAneesh Bansal #ifdef CONFIG_SYS_FSL_CCSR_GUR_LE 360a6b2714SAneesh Bansal #define gur_in32(a) in_le32(a) 370a6b2714SAneesh Bansal #else 380a6b2714SAneesh Bansal #define gur_in32(a) in_be32(a) 390a6b2714SAneesh Bansal #endif 400a6b2714SAneesh Bansal 410a6b2714SAneesh Bansal /* Check the Boot Mode. If Secure, return 1 else return 0 */ 420a6b2714SAneesh Bansal int fsl_check_boot_mode_secure(void) 430a6b2714SAneesh Bansal { 440a6b2714SAneesh Bansal uint32_t val; 450a6b2714SAneesh Bansal struct ccsr_sfp_regs *sfp_regs = (void *)(CONFIG_SYS_SFP_ADDR); 460a6b2714SAneesh Bansal struct ccsr_gur __iomem *gur = (void *)(CONFIG_DCFG_ADDR); 470a6b2714SAneesh Bansal 480a6b2714SAneesh Bansal val = sfp_in32(&sfp_regs->ospr) & ITS_MASK; 490a6b2714SAneesh Bansal if (val == ITS_MASK) 500a6b2714SAneesh Bansal return 1; 510a6b2714SAneesh Bansal 520a6b2714SAneesh Bansal #if defined(CONFIG_FSL_CORENET) || !defined(CONFIG_MPC85xx) 530a6b2714SAneesh Bansal /* For PBL based platforms check the SB_EN bit in RCWSR */ 540a6b2714SAneesh Bansal val = gur_in32(&gur->rcwsr[RCW_SB_EN_REG_INDEX - 1]) & RCW_SB_EN_MASK; 550a6b2714SAneesh Bansal if (val == RCW_SB_EN_MASK) 560a6b2714SAneesh Bansal return 1; 570a6b2714SAneesh Bansal #endif 580a6b2714SAneesh Bansal 590a6b2714SAneesh Bansal #if defined(CONFIG_MPC85xx) && !defined(CONFIG_FSL_CORENET) 600a6b2714SAneesh Bansal /* For Non-PBL Platforms, check the Device Status register 2*/ 610a6b2714SAneesh Bansal val = gur_in32(&gur->pordevsr2) & MPC85xx_PORDEVSR2_SBC_MASK; 620a6b2714SAneesh Bansal if (val != MPC85xx_PORDEVSR2_SBC_MASK) 630a6b2714SAneesh Bansal return 1; 640a6b2714SAneesh Bansal 650a6b2714SAneesh Bansal #endif 660a6b2714SAneesh Bansal return 0; 670a6b2714SAneesh Bansal } 68d0412885SAneesh Bansal 698f01397bSSumit Garg #ifndef CONFIG_SPL_BUILD 70d0412885SAneesh Bansal int fsl_setenv_chain_of_trust(void) 71d0412885SAneesh Bansal { 72d0412885SAneesh Bansal /* Check Boot Mode 73d0412885SAneesh Bansal * If Boot Mode is Non-Secure, no changes are required 74d0412885SAneesh Bansal */ 75d0412885SAneesh Bansal if (fsl_check_boot_mode_secure() == 0) 76d0412885SAneesh Bansal return 0; 77d0412885SAneesh Bansal 78d0412885SAneesh Bansal /* If Boot mode is Secure, set the environment variables 79d0412885SAneesh Bansal * bootdelay = 0 (To disable Boot Prompt) 80d0412885SAneesh Bansal * bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script) 81d0412885SAneesh Bansal */ 82d0412885SAneesh Bansal setenv("bootdelay", "0"); 83d0412885SAneesh Bansal setenv("bootcmd", CONFIG_CHAIN_BOOT_CMD); 84d0412885SAneesh Bansal return 0; 85d0412885SAneesh Bansal } 868f01397bSSumit Garg #endif 878f01397bSSumit Garg 888f01397bSSumit Garg #ifdef CONFIG_SPL_BUILD 898f01397bSSumit Garg void spl_validate_uboot(uint32_t hdr_addr, uintptr_t img_addr) 908f01397bSSumit Garg { 918f01397bSSumit Garg int res; 928f01397bSSumit Garg 938f01397bSSumit Garg /* 948f01397bSSumit Garg * Check Boot Mode 958f01397bSSumit Garg * If Boot Mode is Non-Secure, skip validation 968f01397bSSumit Garg */ 978f01397bSSumit Garg if (fsl_check_boot_mode_secure() == 0) 988f01397bSSumit Garg return; 998f01397bSSumit Garg 1008f01397bSSumit Garg printf("SPL: Validating U-Boot image\n"); 1018f01397bSSumit Garg 1028f01397bSSumit Garg #ifdef CONFIG_ADDR_MAP 1038f01397bSSumit Garg init_addr_map(); 1048f01397bSSumit Garg #endif 1058f01397bSSumit Garg 1068f01397bSSumit Garg #ifdef CONFIG_FSL_CORENET 1078f01397bSSumit Garg if (pamu_init() < 0) 1088f01397bSSumit Garg fsl_secboot_handle_error(ERROR_ESBC_PAMU_INIT); 1098f01397bSSumit Garg #endif 1108f01397bSSumit Garg 1118f01397bSSumit Garg #ifdef CONFIG_FSL_CAAM 1128f01397bSSumit Garg if (sec_init() < 0) 1138f01397bSSumit Garg fsl_secboot_handle_error(ERROR_ESBC_SEC_INIT); 1148f01397bSSumit Garg #endif 1158f01397bSSumit Garg 1168f01397bSSumit Garg /* 1178f01397bSSumit Garg * dm_init_and_scan() is called as part of common SPL framework, so no 1188f01397bSSumit Garg * need to call it again but in case of powerpc platforms which currently 1198f01397bSSumit Garg * do not use common SPL framework, so need to call this function here. 1208f01397bSSumit Garg */ 1218f01397bSSumit Garg #if defined(CONFIG_SPL_DM) && (!defined(CONFIG_SPL_FRAMEWORK)) 122028ac8c7SSumit Garg dm_init_and_scan(true); 1238f01397bSSumit Garg #endif 1248f01397bSSumit Garg res = fsl_secboot_validate(hdr_addr, CONFIG_SPL_UBOOT_KEY_HASH, 1258f01397bSSumit Garg &img_addr); 1268f01397bSSumit Garg 1278f01397bSSumit Garg if (res == 0) 1288f01397bSSumit Garg printf("SPL: Validation of U-boot successful\n"); 1298f01397bSSumit Garg } 130028ac8c7SSumit Garg 131028ac8c7SSumit Garg #ifdef CONFIG_SPL_FRAMEWORK 132028ac8c7SSumit Garg /* Override weak funtion defined in SPL framework to enable validation 133028ac8c7SSumit Garg * of main u-boot image before jumping to u-boot image. 134028ac8c7SSumit Garg */ 135028ac8c7SSumit Garg void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) 136028ac8c7SSumit Garg { 137028ac8c7SSumit Garg typedef void __noreturn (*image_entry_noargs_t)(void); 138028ac8c7SSumit Garg uint32_t hdr_addr; 139028ac8c7SSumit Garg 140028ac8c7SSumit Garg image_entry_noargs_t image_entry = 141028ac8c7SSumit Garg (image_entry_noargs_t)(unsigned long)spl_image->entry_point; 142028ac8c7SSumit Garg 143028ac8c7SSumit Garg hdr_addr = (spl_image->entry_point + spl_image->size - 144028ac8c7SSumit Garg CONFIG_U_BOOT_HDR_SIZE); 145028ac8c7SSumit Garg spl_validate_uboot(hdr_addr, (uintptr_t)spl_image->entry_point); 146028ac8c7SSumit Garg /* 147028ac8c7SSumit Garg * In case of failure in validation, spl_validate_uboot would 148028ac8c7SSumit Garg * not return back in case of Production environment with ITS=1. 149028ac8c7SSumit Garg * Thus U-Boot will not start. 150028ac8c7SSumit Garg * In Development environment (ITS=0 and SB_EN=1), the function 151028ac8c7SSumit Garg * may return back in case of non-fatal failures. 152028ac8c7SSumit Garg */ 153028ac8c7SSumit Garg 1544386feb7STom Rini debug("image entry point: 0x%lX\n", spl_image->entry_point); 155028ac8c7SSumit Garg image_entry(); 156028ac8c7SSumit Garg } 157028ac8c7SSumit Garg #endif /* ifdef CONFIG_SPL_FRAMEWORK */ 1588f01397bSSumit Garg #endif /* ifdef CONFIG_SPL_BUILD */ 159