1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright 2004, 2011 Freescale Semiconductor. 4 */ 5 6 7 #include <common.h> 8 9 10 /* 11 * CADMUS Board System Registers 12 */ 13 #ifndef CONFIG_SYS_CADMUS_BASE_REG 14 #define CONFIG_SYS_CADMUS_BASE_REG (CADMUS_BASE_ADDR + 0x4000) 15 #endif 16 17 typedef struct cadmus_reg { 18 u_char cm_ver; /* Board version */ 19 u_char cm_csr; /* General control/status */ 20 u_char cm_rst; /* Reset control */ 21 u_char cm_hsclk; /* High speed clock */ 22 u_char cm_hsxclk; /* High speed clock extended */ 23 u_char cm_led; /* LED data */ 24 u_char cm_pci; /* PCI control/status */ 25 u_char cm_dma; /* DMA control */ 26 u_char cm_reserved[248]; /* Total 256 bytes */ 27 } cadmus_reg_t; 28 29 30 unsigned int 31 get_board_version(void) 32 { 33 volatile cadmus_reg_t *cadmus = (cadmus_reg_t *)CONFIG_SYS_CADMUS_BASE_REG; 34 35 return cadmus->cm_ver; 36 } 37 38 39 unsigned long 40 get_clock_freq(void) 41 { 42 volatile cadmus_reg_t *cadmus = (cadmus_reg_t *)CONFIG_SYS_CADMUS_BASE_REG; 43 44 uint pci1_speed = (cadmus->cm_pci >> 2) & 0x3; /* PSPEED in [4:5] */ 45 46 if (pci1_speed == 0) { 47 return 33333333; 48 } else if (pci1_speed == 1) { 49 return 66666666; 50 } else { 51 /* Really, unknown. Be safe? */ 52 return 33333333; 53 } 54 } 55 56 57 unsigned int 58 get_pci_slot(void) 59 { 60 volatile cadmus_reg_t *cadmus = (cadmus_reg_t *)CONFIG_SYS_CADMUS_BASE_REG; 61 62 /* 63 * PCI slot in USER bits CSR[6:7] by convention. 64 */ 65 return ((cadmus->cm_csr >> 6) & 0x3) + 1; 66 } 67 68 69 unsigned int 70 get_pci_dual(void) 71 { 72 volatile cadmus_reg_t *cadmus = (cadmus_reg_t *)CONFIG_SYS_CADMUS_BASE_REG; 73 74 /* 75 * PCI DUAL in CM_PCI[3] 76 */ 77 return cadmus->cm_pci & 0x10; 78 } 79