1 // SPDX-License-Identifier: GPL-2.0+ 2 /** 3 * Copyright 2013 Freescale Semiconductor 4 * Author: Mingkai Hu <Mingkai.hu@freescale.com> 5 * Po Liu <Po.Liu@freescale.com> 6 * 7 * This file provides support for the board-specific CPLD used on some Freescale 8 * reference boards. 9 * 10 * The following macros need to be defined: 11 * 12 * CONFIG_SYS_CPLD_BASE - The virtual address of the base of the 13 * CPLD register map 14 * 15 */ 16 17 #include <common.h> 18 #include <command.h> 19 #include <asm/io.h> 20 21 #include "cpld.h" 22 /** 23 * Set the boot bank to the alternate bank 24 */ 25 void cpld_set_altbank(u8 banksel) 26 { 27 struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); 28 u8 reg11; 29 30 reg11 = in_8(&cpld_data->flhcsr); 31 32 switch (banksel) { 33 case 1: 34 out_8(&cpld_data->flhcsr, (reg11 & CPLD_BANKSEL_MASK) 35 | CPLD_BANKSEL_EN | CPLD_SELECT_BANK1); 36 break; 37 case 2: 38 out_8(&cpld_data->flhcsr, (reg11 & CPLD_BANKSEL_MASK) 39 | CPLD_BANKSEL_EN | CPLD_SELECT_BANK2); 40 break; 41 case 3: 42 out_8(&cpld_data->flhcsr, (reg11 & CPLD_BANKSEL_MASK) 43 | CPLD_BANKSEL_EN | CPLD_SELECT_BANK3); 44 break; 45 case 4: 46 out_8(&cpld_data->flhcsr, (reg11 & CPLD_BANKSEL_MASK) 47 | CPLD_BANKSEL_EN | CPLD_SELECT_BANK4); 48 break; 49 default: 50 printf("Invalid value! [1-4]\n"); 51 return; 52 } 53 54 udelay(100); 55 do_reset(NULL, 0, 0, NULL); 56 } 57 58 /** 59 * Set the boot bank to the default bank 60 */ 61 void cpld_set_defbank(void) 62 { 63 cpld_set_altbank(4); 64 } 65 66 #ifdef DEBUG 67 static void cpld_dump_regs(void) 68 { 69 struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); 70 71 printf("chipid1 = 0x%02x\n", in_8(&cpld_data->chipid1)); 72 printf("chipid2 = 0x%02x\n", in_8(&cpld_data->chipid2)); 73 printf("hwver = 0x%02x\n", in_8(&cpld_data->hwver)); 74 printf("cpldver = 0x%02x\n", in_8(&cpld_data->cpldver)); 75 printf("rstcon = 0x%02x\n", in_8(&cpld_data->rstcon)); 76 printf("flhcsr = 0x%02x\n", in_8(&cpld_data->flhcsr)); 77 printf("wdcsr = 0x%02x\n", in_8(&cpld_data->wdcsr)); 78 printf("wdkick = 0x%02x\n", in_8(&cpld_data->wdkick)); 79 printf("fancsr = 0x%02x\n", in_8(&cpld_data->fancsr)); 80 printf("ledcsr = 0x%02x\n", in_8(&cpld_data->ledcsr)); 81 printf("misc = 0x%02x\n", in_8(&cpld_data->misccsr)); 82 printf("bootor = 0x%02x\n", in_8(&cpld_data->bootor)); 83 printf("bootcfg1 = 0x%02x\n", in_8(&cpld_data->bootcfg1)); 84 printf("bootcfg2 = 0x%02x\n", in_8(&cpld_data->bootcfg2)); 85 printf("bootcfg3 = 0x%02x\n", in_8(&cpld_data->bootcfg3)); 86 printf("bootcfg4 = 0x%02x\n", in_8(&cpld_data->bootcfg4)); 87 putc('\n'); 88 } 89 #endif 90 91 #ifndef CONFIG_SPL_BUILD 92 int cpld_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 93 { 94 int rc = 0; 95 unsigned char value; 96 97 if (argc <= 1) 98 return cmd_usage(cmdtp); 99 100 if (strcmp(argv[1], "reset") == 0) { 101 if (!strcmp(argv[2], "altbank") && argv[3]) { 102 value = (u8)simple_strtoul(argv[3], NULL, 16); 103 cpld_set_altbank(value); 104 } else if (!argv[2]) 105 cpld_set_defbank(); 106 else 107 cmd_usage(cmdtp); 108 #ifdef DEBUG 109 } else if (strcmp(argv[1], "dump") == 0) { 110 cpld_dump_regs(); 111 #endif 112 } else 113 rc = cmd_usage(cmdtp); 114 115 return rc; 116 } 117 118 U_BOOT_CMD( 119 cpld_cmd, CONFIG_SYS_MAXARGS, 1, cpld_cmd, 120 "Reset the board using the CPLD sequencer", 121 "reset - hard reset to default bank 4\n" 122 "cpld_cmd reset altbank [bank]- reset to alternate bank\n" 123 " - [bank] bank value select 1-4\n" 124 " - bank 1 on the flash 0x0000000~0x0ffffff\n" 125 " - bank 2 on the flash 0x1000000~0x1ffffff\n" 126 " - bank 3 on the flash 0x2000000~0x2ffffff\n" 127 " - bank 4 on the flash 0x3000000~0x3ffffff\n" 128 #ifdef DEBUG 129 "cpld_cmd dump - display the CPLD registers\n" 130 #endif 131 ); 132 #endif 133