1 /** 2 * Copyright 2013 Freescale Semiconductor 3 * Author: Mingkai Hu <Mingkai.hu@freescale.com> 4 * Po Liu <Po.Liu@freescale.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 * 8 * This file provides support for the board-specific CPLD used on some Freescale 9 * reference boards. 10 * 11 * The following macros need to be defined: 12 * 13 * CONFIG_SYS_CPLD_BASE - The virtual address of the base of the 14 * CPLD register map 15 * 16 */ 17 18 #include <common.h> 19 #include <command.h> 20 #include <asm/io.h> 21 22 #include "cpld.h" 23 /** 24 * Set the boot bank to the alternate bank 25 */ 26 void cpld_set_altbank(u8 banksel) 27 { 28 struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); 29 u8 reg11; 30 31 reg11 = in_8(&cpld_data->flhcsr); 32 33 switch (banksel) { 34 case 1: 35 out_8(&cpld_data->flhcsr, (reg11 & CPLD_BANKSEL_MASK) 36 | CPLD_BANKSEL_EN | CPLD_SELECT_BANK1); 37 break; 38 case 2: 39 out_8(&cpld_data->flhcsr, (reg11 & CPLD_BANKSEL_MASK) 40 | CPLD_BANKSEL_EN | CPLD_SELECT_BANK2); 41 break; 42 case 3: 43 out_8(&cpld_data->flhcsr, (reg11 & CPLD_BANKSEL_MASK) 44 | CPLD_BANKSEL_EN | CPLD_SELECT_BANK3); 45 break; 46 case 4: 47 out_8(&cpld_data->flhcsr, (reg11 & CPLD_BANKSEL_MASK) 48 | CPLD_BANKSEL_EN | CPLD_SELECT_BANK4); 49 break; 50 default: 51 printf("Invalid value! [1-4]\n"); 52 return; 53 } 54 55 udelay(100); 56 do_reset(NULL, 0, 0, NULL); 57 } 58 59 /** 60 * Set the boot bank to the default bank 61 */ 62 void cpld_set_defbank(void) 63 { 64 cpld_set_altbank(4); 65 } 66 67 #ifdef DEBUG 68 static void cpld_dump_regs(void) 69 { 70 struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); 71 72 printf("chipid1 = 0x%02x\n", in_8(&cpld_data->chipid1)); 73 printf("chipid2 = 0x%02x\n", in_8(&cpld_data->chipid2)); 74 printf("hwver = 0x%02x\n", in_8(&cpld_data->hwver)); 75 printf("cpldver = 0x%02x\n", in_8(&cpld_data->cpldver)); 76 printf("rstcon = 0x%02x\n", in_8(&cpld_data->rstcon)); 77 printf("flhcsr = 0x%02x\n", in_8(&cpld_data->flhcsr)); 78 printf("wdcsr = 0x%02x\n", in_8(&cpld_data->wdcsr)); 79 printf("wdkick = 0x%02x\n", in_8(&cpld_data->wdkick)); 80 printf("fancsr = 0x%02x\n", in_8(&cpld_data->fancsr)); 81 printf("ledcsr = 0x%02x\n", in_8(&cpld_data->ledcsr)); 82 printf("misc = 0x%02x\n", in_8(&cpld_data->misccsr)); 83 printf("bootor = 0x%02x\n", in_8(&cpld_data->bootor)); 84 printf("bootcfg1 = 0x%02x\n", in_8(&cpld_data->bootcfg1)); 85 printf("bootcfg2 = 0x%02x\n", in_8(&cpld_data->bootcfg2)); 86 printf("bootcfg3 = 0x%02x\n", in_8(&cpld_data->bootcfg3)); 87 printf("bootcfg4 = 0x%02x\n", in_8(&cpld_data->bootcfg4)); 88 putc('\n'); 89 } 90 #endif 91 92 #ifndef CONFIG_SPL_BUILD 93 int cpld_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 94 { 95 int rc = 0; 96 unsigned char value; 97 98 if (argc <= 1) 99 return cmd_usage(cmdtp); 100 101 if (strcmp(argv[1], "reset") == 0) { 102 if (!strcmp(argv[2], "altbank") && argv[3]) { 103 value = (u8)simple_strtoul(argv[3], NULL, 16); 104 cpld_set_altbank(value); 105 } else if (!argv[2]) 106 cpld_set_defbank(); 107 else 108 cmd_usage(cmdtp); 109 #ifdef DEBUG 110 } else if (strcmp(argv[1], "dump") == 0) { 111 cpld_dump_regs(); 112 #endif 113 } else 114 rc = cmd_usage(cmdtp); 115 116 return rc; 117 } 118 119 U_BOOT_CMD( 120 cpld_cmd, CONFIG_SYS_MAXARGS, 1, cpld_cmd, 121 "Reset the board using the CPLD sequencer", 122 "reset - hard reset to default bank 4\n" 123 "cpld_cmd reset altbank [bank]- reset to alternate bank\n" 124 " - [bank] bank value select 1-4\n" 125 " - bank 1 on the flash 0x0000000~0x0ffffff\n" 126 " - bank 2 on the flash 0x1000000~0x1ffffff\n" 127 " - bank 3 on the flash 0x2000000~0x2ffffff\n" 128 " - bank 4 on the flash 0x3000000~0x3ffffff\n" 129 #ifdef DEBUG 130 "cpld_cmd dump - display the CPLD registers\n" 131 #endif 132 ); 133 #endif 134