1 /* 2 * pci.c -- esd VME8349 PCI board support. 3 * Copyright (c) 2006 Wind River Systems, Inc. 4 * Copyright (C) 2006-2009 Freescale Semiconductor, Inc. 5 * 6 * Based on MPC8349 PCI support but w/o PIB related code. 7 * 8 * See file CREDITS for list of people who contributed to this 9 * project. 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of 14 * the License, or (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24 * MA 02111-1307 USA 25 * 26 */ 27 28 #include <asm/mmu.h> 29 #include <asm/io.h> 30 #include <common.h> 31 #include <mpc83xx.h> 32 #include <pci.h> 33 #include <i2c.h> 34 #include <asm/fsl_i2c.h> 35 36 DECLARE_GLOBAL_DATA_PTR; 37 38 static struct pci_region pci1_regions[] = { 39 { 40 bus_start: CONFIG_SYS_PCI1_MEM_BASE, 41 phys_start: CONFIG_SYS_PCI1_MEM_PHYS, 42 size: CONFIG_SYS_PCI1_MEM_SIZE, 43 flags: PCI_REGION_MEM | PCI_REGION_PREFETCH 44 }, 45 { 46 bus_start: CONFIG_SYS_PCI1_IO_BASE, 47 phys_start: CONFIG_SYS_PCI1_IO_PHYS, 48 size: CONFIG_SYS_PCI1_IO_SIZE, 49 flags: PCI_REGION_IO 50 }, 51 { 52 bus_start: CONFIG_SYS_PCI1_MMIO_BASE, 53 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS, 54 size: CONFIG_SYS_PCI1_MMIO_SIZE, 55 flags: PCI_REGION_MEM 56 }, 57 }; 58 59 /* 60 * pci_init_board() 61 * 62 * NOTICE: PCI2 is not supported. There is only one 63 * physical PCI slot on the board. 64 * 65 */ 66 void 67 pci_init_board(void) 68 { 69 volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR; 70 volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; 71 volatile law83xx_t *pci_law = immr->sysconf.pcilaw; 72 struct pci_region *reg[] = { pci1_regions }; 73 u8 reg8; 74 int monarch = 0; 75 76 i2c_set_bus_num(1); 77 /* Read the PCI_M66EN jumper setting */ 78 if ((i2c_read(CONFIG_SYS_I2C_8574_ADDR2, 0, 0, ®8, 1) == 0) || 79 (i2c_read(0x38 , 0, 0, ®8, 1) == 0)) { 80 if (reg8 & 0x40) { 81 clk->occr = 0xff000000; /* 66 MHz PCI */ 82 printf("PCI: 66MHz\n"); 83 } else { 84 clk->occr = 0xffff0003; /* 33 MHz PCI */ 85 printf("PCI: 33MHz\n"); 86 } 87 if (((reg8 & 0x01) == 0) || ((reg8 & 0x02) == 0)) 88 monarch = 1; 89 } else { 90 clk->occr = 0xffff0003; /* 33 MHz PCI */ 91 printf("PCI: 33MHz (I2C read failed)\n"); 92 } 93 udelay(2000); 94 95 /* 96 * Assert/deassert PCI reset 97 */ 98 setbits_be32(&immr->gpio[0].dat, 0x00800000); 99 setbits_be32(&immr->gpio[0].dir, 0x00800000); 100 setbits_be32(&immr->gpio[1].dir, 0x08800000); 101 udelay(200); 102 setbits_be32(&immr->gpio[1].dat, 0x08000000); 103 udelay(200); 104 setbits_be32(&immr->gpio[1].dat, 0x08800000); 105 udelay(600000); 106 clrbits_be32(&immr->gpio[1].dat, 0x00100000); 107 108 /* Configure PCI Local Access Windows */ 109 pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR; 110 pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G; 111 112 pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR; 113 pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M; 114 115 udelay(2000); 116 117 if (monarch == 0) 118 mpc83xx_pci_init(1, reg, 0); 119 } 120