xref: /openbmc/u-boot/board/esd/vme8349/caddy.c (revision 8f695232)
1 /*
2  * caddy.c -- esd VME8349 support for "missing" access modes in TSI148.
3  * Copyright (c) 2009 esd gmbh.
4  *
5  * Reinhard Arlt <reinhard.arlt@esd-electronics.com>
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #include <common.h>
11 #include <console.h>
12 #include <ioports.h>
13 #include <mpc83xx.h>
14 #include <asm/mpc8349_pci.h>
15 #include <pci.h>
16 #include <asm/mmu.h>
17 #include <asm/io.h>
18 
19 #include "caddy.h"
20 
21 static struct caddy_interface *caddy_interface;
22 
23 void generate_answer(struct caddy_cmd *cmd, uint32_t status, uint32_t *result)
24 {
25 	struct caddy_answer *answer;
26 	uint32_t ptr;
27 
28 	answer = &caddy_interface->answer[caddy_interface->answer_in];
29 	memset((void *)answer, 0, sizeof(struct caddy_answer));
30 	answer->answer = cmd->cmd;
31 	answer->issue = cmd->issue;
32 	answer->status = status;
33 	memcpy(answer->par, result, 5 * sizeof(result[0]));
34 	ptr = caddy_interface->answer_in + 1;
35 	ptr = ptr & (ANSWER_SIZE - 1);
36 	if (ptr != caddy_interface->answer_out)
37 		caddy_interface->answer_in = ptr;
38 }
39 
40 int do_caddy(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
41 {
42 	unsigned long base_addr;
43 	uint32_t ptr;
44 	struct caddy_cmd *caddy_cmd;
45 	uint32_t result[5];
46 	uint16_t data16;
47 	uint8_t data8;
48 	uint32_t status;
49 	pci_dev_t dev;
50 	void *pci_ptr;
51 
52 	if (argc < 2) {
53 		puts("Missing parameter\n");
54 		return 1;
55 	}
56 
57 	base_addr = simple_strtoul(argv[1], NULL, 16);
58 	caddy_interface = (struct caddy_interface *) base_addr;
59 
60 	memset((void *)caddy_interface, 0, sizeof(struct caddy_interface));
61 	memcpy((void *)&caddy_interface->magic[0], &CADDY_MAGIC, 16);
62 
63 	while (ctrlc() == 0) {
64 		if (caddy_interface->cmd_in != caddy_interface->cmd_out) {
65 			memset(result, 0, 5 * sizeof(result[0]));
66 			status = 0;
67 			caddy_cmd = &caddy_interface->cmd[caddy_interface->cmd_out];
68 			pci_ptr = (void *)CONFIG_SYS_PCI1_IO_PHYS +
69 				(caddy_cmd->addr & 0x001fffff);
70 
71 			switch (caddy_cmd->cmd) {
72 			case CADDY_CMD_IO_READ_8:
73 				result[0] = in_8(pci_ptr);
74 				break;
75 
76 			case CADDY_CMD_IO_READ_16:
77 				result[0] = in_be16(pci_ptr);
78 				break;
79 
80 			case CADDY_CMD_IO_READ_32:
81 				result[0] = in_be32(pci_ptr);
82 				break;
83 
84 			case CADDY_CMD_IO_WRITE_8:
85 				data8 = caddy_cmd->par[0] & 0x000000ff;
86 				out_8(pci_ptr, data8);
87 				break;
88 
89 			case CADDY_CMD_IO_WRITE_16:
90 				data16 = caddy_cmd->par[0] & 0x0000ffff;
91 				out_be16(pci_ptr, data16);
92 				break;
93 
94 			case CADDY_CMD_IO_WRITE_32:
95 				out_be32(pci_ptr, caddy_cmd->par[0]);
96 				break;
97 
98 			case CADDY_CMD_CONFIG_READ_8:
99 				dev = PCI_BDF(caddy_cmd->par[0],
100 					      caddy_cmd->par[1],
101 					      caddy_cmd->par[2]);
102 				status = pci_read_config_byte(dev,
103 							      caddy_cmd->addr,
104 							      &data8);
105 				result[0] = data8;
106 				break;
107 
108 			case CADDY_CMD_CONFIG_READ_16:
109 				dev = PCI_BDF(caddy_cmd->par[0],
110 					      caddy_cmd->par[1],
111 					      caddy_cmd->par[2]);
112 				status = pci_read_config_word(dev,
113 							      caddy_cmd->addr,
114 							      &data16);
115 				result[0] = data16;
116 				break;
117 
118 			case CADDY_CMD_CONFIG_READ_32:
119 				dev = PCI_BDF(caddy_cmd->par[0],
120 					      caddy_cmd->par[1],
121 					      caddy_cmd->par[2]);
122 				status = pci_read_config_dword(dev,
123 							       caddy_cmd->addr,
124 							       &result[0]);
125 				break;
126 
127 			case CADDY_CMD_CONFIG_WRITE_8:
128 				dev = PCI_BDF(caddy_cmd->par[0],
129 					      caddy_cmd->par[1],
130 					      caddy_cmd->par[2]);
131 				data8 = caddy_cmd->par[3] & 0x000000ff;
132 				status = pci_write_config_byte(dev,
133 							       caddy_cmd->addr,
134 							       data8);
135 				break;
136 
137 			case CADDY_CMD_CONFIG_WRITE_16:
138 				dev = PCI_BDF(caddy_cmd->par[0],
139 					      caddy_cmd->par[1],
140 					      caddy_cmd->par[2]);
141 				data16 = caddy_cmd->par[3] & 0x0000ffff;
142 				status = pci_write_config_word(dev,
143 							       caddy_cmd->addr,
144 							       data16);
145 				break;
146 
147 			case CADDY_CMD_CONFIG_WRITE_32:
148 				dev = PCI_BDF(caddy_cmd->par[0],
149 					      caddy_cmd->par[1],
150 					      caddy_cmd->par[2]);
151 				status = pci_write_config_dword(dev,
152 								caddy_cmd->addr,
153 								caddy_cmd->par[3]);
154 				break;
155 
156 			default:
157 				status = 0xffffffff;
158 				break;
159 			}
160 
161 			generate_answer(caddy_cmd, status, &result[0]);
162 
163 			ptr = caddy_interface->cmd_out + 1;
164 			ptr = ptr & (CMD_SIZE - 1);
165 			caddy_interface->cmd_out = ptr;
166 		}
167 
168 		caddy_interface->heartbeat++;
169 	}
170 
171 	return 0;
172 }
173 
174 U_BOOT_CMD(
175 	caddy,	2,	0,	do_caddy,
176 	"Start Caddy server.",
177 	"Start Caddy server with Data structure a given addr\n"
178 	);
179