1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C)Copyright 2016 Rockchip Electronics Co., Ltd
4  * Authors: Andy Yan <andy.yan@rock-chips.com>
5  */
6 
7 #include <common.h>
8 #include <asm/io.h>
9 #include <fdtdec.h>
10 #include <asm/arch/grf_rv1108.h>
11 #include <asm/arch/hardware.h>
12 #include <asm/gpio.h>
13 
14 DECLARE_GLOBAL_DATA_PTR;
15 
16 int mach_cpu_init(void)
17 {
18 	int node;
19 	struct rv1108_grf *grf;
20 	enum {
21 		GPIO3C3_SHIFT           = 6,
22 		GPIO3C3_MASK            = 3 << GPIO3C3_SHIFT,
23 
24 		GPIO3C2_SHIFT           = 4,
25 		GPIO3C2_MASK            = 3 << GPIO3C2_SHIFT,
26 
27 		GPIO2D2_SHIFT		= 4,
28 		GPIO2D2_MASK		= 3 << GPIO2D2_SHIFT,
29 		GPIO2D2_GPIO            = 0,
30 		GPIO2D2_UART2_SOUT_M0,
31 
32 		GPIO2D1_SHIFT		= 2,
33 		GPIO2D1_MASK		= 3 << GPIO2D1_SHIFT,
34 		GPIO2D1_GPIO            = 0,
35 		GPIO2D1_UART2_SIN_M0,
36 	};
37 
38 	node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "rockchip,rv1108-grf");
39 	grf = (struct rv1108_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
40 
41 	/* Elgin board use UART2 m0 for debug*/
42 	rk_clrsetreg(&grf->gpio2d_iomux,
43 		     GPIO2D2_MASK | GPIO2D1_MASK,
44 		     GPIO2D2_UART2_SOUT_M0 << GPIO2D2_SHIFT |
45 		     GPIO2D1_UART2_SIN_M0 << GPIO2D1_SHIFT);
46 	rk_clrreg(&grf->gpio3c_iomux, GPIO3C3_MASK | GPIO3C2_MASK);
47 
48 	return 0;
49 }
50 
51 #define MODEM_ENABLE_GPIO 111
52 
53 int board_init(void)
54 {
55 	gpio_request(MODEM_ENABLE_GPIO, "modem_enable");
56 	gpio_direction_output(MODEM_ENABLE_GPIO, 0);
57 
58 	return 0;
59 }
60 
61 int dram_init(void)
62 {
63 	gd->ram_size = 0x8000000;
64 
65 	return 0;
66 }
67 
68 int dram_init_banksize(void)
69 {
70 	gd->bd->bi_dram[0].start = 0x60000000;
71 	gd->bd->bi_dram[0].size = 0x8000000;
72 
73 	return 0;
74 }
75