xref: /openbmc/u-boot/board/eets/pdu001/board.h (revision 83d290c5)
1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */
285ab0452SFelix Brack /*
385ab0452SFelix Brack  * board.h
485ab0452SFelix Brack  *
585ab0452SFelix Brack  * EETS GmbH PDU001 board information header
685ab0452SFelix Brack  *
785ab0452SFelix Brack  * Copyright (C) 2018 EETS GmbH - http://www.eets.ch/
885ab0452SFelix Brack  *
985ab0452SFelix Brack  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
1085ab0452SFelix Brack  */
1185ab0452SFelix Brack 
1285ab0452SFelix Brack #ifndef _BOARD_H_
1385ab0452SFelix Brack #define _BOARD_H_
1485ab0452SFelix Brack 
1585ab0452SFelix Brack /*
1685ab0452SFelix Brack  * We have two pin mux functions that must exist. First we need I2C0 to
1785ab0452SFelix Brack  * access the TPS65910 PMIC located on the M2 computing module.
1885ab0452SFelix Brack  * Second, if we want low-level debugging or a early UART (ie. before the
1985ab0452SFelix Brack  * pin controller driver is running), we need one of the UART ports UART0 to
2085ab0452SFelix Brack  * UART5 (usually UART3 since it is wired to K2).
2185ab0452SFelix Brack  * In case of I2C0 access we explicitly don't rely on the the ROM but we could
2285ab0452SFelix Brack  * do so as we use the primary mode (mode 0) for I2C0.
2385ab0452SFelix Brack  * All other multiplexing and pin configuration is done by the DT once it
2485ab0452SFelix Brack  * gets parsed by the pin controller driver.
2585ab0452SFelix Brack  * However we relay on the ROM to configure the pins of MMC0 (eMMC) as well
2685ab0452SFelix Brack  * as MMC1 (microSD card-cage) since these are our boot devices.
2785ab0452SFelix Brack  */
2885ab0452SFelix Brack void enable_uart0_pin_mux(void);
2985ab0452SFelix Brack void enable_uart1_pin_mux(void);
3085ab0452SFelix Brack void enable_uart2_pin_mux(void);
3185ab0452SFelix Brack void enable_uart3_pin_mux(void);
3285ab0452SFelix Brack void enable_uart4_pin_mux(void);
3385ab0452SFelix Brack void enable_uart5_pin_mux(void);
3485ab0452SFelix Brack void enable_uart_pin_mux(u32 addr);
3585ab0452SFelix Brack void enable_i2c0_pin_mux(void);
3685ab0452SFelix Brack 
3785ab0452SFelix Brack #endif
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