1649a33e4SStefano Babic /* 2649a33e4SStefano Babic * (C) Copyright 2010 3649a33e4SStefano Babic * Stefano Babic, DENX Software Engineering, sbabic@denx.de 4649a33e4SStefano Babic * 5649a33e4SStefano Babic * Based on da850evm.c, original Copyrights follow: 6649a33e4SStefano Babic * 7649a33e4SStefano Babic * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 8649a33e4SStefano Babic * 9649a33e4SStefano Babic * Based on da830evm.c. Original Copyrights follow: 10649a33e4SStefano Babic * 11649a33e4SStefano Babic * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> 12649a33e4SStefano Babic * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> 13649a33e4SStefano Babic * 141a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 15649a33e4SStefano Babic */ 16649a33e4SStefano Babic 17649a33e4SStefano Babic #include <common.h> 18649a33e4SStefano Babic #include <i2c.h> 19649a33e4SStefano Babic #include <net.h> 20649a33e4SStefano Babic #include <netdev.h> 21*c62db35dSSimon Glass #include <asm/mach-types.h> 22649a33e4SStefano Babic #include <asm/arch/hardware.h> 233e01ed00SKhoronzhuk, Ivan #include <asm/ti-common/davinci_nand.h> 24649a33e4SStefano Babic #include <asm/arch/emac_defs.h> 25649a33e4SStefano Babic #include <asm/io.h> 26649a33e4SStefano Babic #include <asm/arch/davinci_misc.h> 271441aa6aSStefano Babic #include <asm/gpio.h> 280017f9eeSHeiko Schocher #include "../../../drivers/video/da8xx-fb.h" 29649a33e4SStefano Babic 30649a33e4SStefano Babic DECLARE_GLOBAL_DATA_PTR; 31649a33e4SStefano Babic 323c891011SStefano Babic static const struct da8xx_panel lcd_panel = { 333c891011SStefano Babic /* Casio COM57H531x */ 343c891011SStefano Babic .name = "Casio_COM57H531x", 353c891011SStefano Babic .width = 640, 363c891011SStefano Babic .height = 480, 373c891011SStefano Babic .hfp = 12, 383c891011SStefano Babic .hbp = 144, 393c891011SStefano Babic .hsw = 30, 403c891011SStefano Babic .vfp = 10, 413c891011SStefano Babic .vbp = 35, 423c891011SStefano Babic .vsw = 3, 433c891011SStefano Babic .pxl_clk = 25000000, 443c891011SStefano Babic .invert_pxl_clk = 0, 453c891011SStefano Babic }; 463c891011SStefano Babic 47765f2f08SHeiko Schocher static const struct display_panel disp_panel = { 48765f2f08SHeiko Schocher QVGA, 49765f2f08SHeiko Schocher 16, 50765f2f08SHeiko Schocher 16, 51765f2f08SHeiko Schocher COLOR_ACTIVE, 52765f2f08SHeiko Schocher }; 53765f2f08SHeiko Schocher 54765f2f08SHeiko Schocher static const struct lcd_ctrl_config lcd_cfg = { 55765f2f08SHeiko Schocher &disp_panel, 56765f2f08SHeiko Schocher .ac_bias = 255, 57765f2f08SHeiko Schocher .ac_bias_intrpt = 0, 58765f2f08SHeiko Schocher .dma_burst_sz = 16, 59765f2f08SHeiko Schocher .bpp = 16, 60765f2f08SHeiko Schocher .fdd = 255, 61765f2f08SHeiko Schocher .tft_alt_mode = 0, 62765f2f08SHeiko Schocher .stn_565_mode = 0, 63765f2f08SHeiko Schocher .mono_8bit_mode = 0, 64765f2f08SHeiko Schocher .invert_line_clock = 1, 65765f2f08SHeiko Schocher .invert_frm_clock = 1, 66765f2f08SHeiko Schocher .sync_edge = 0, 67765f2f08SHeiko Schocher .sync_ctrl = 1, 68765f2f08SHeiko Schocher .raster_order = 0, 69765f2f08SHeiko Schocher }; 70765f2f08SHeiko Schocher 71649a33e4SStefano Babic /* SPI0 pin muxer settings */ 72649a33e4SStefano Babic static const struct pinmux_config spi1_pins[] = { 73649a33e4SStefano Babic { pinmux(5), 1, 1 }, 74649a33e4SStefano Babic { pinmux(5), 1, 2 }, 75649a33e4SStefano Babic { pinmux(5), 1, 4 }, 76649a33e4SStefano Babic { pinmux(5), 1, 5 } 77649a33e4SStefano Babic }; 78649a33e4SStefano Babic 794205987aSStefano Babic /* I2C pin muxer settings */ 804205987aSStefano Babic static const struct pinmux_config i2c_pins[] = { 814205987aSStefano Babic { pinmux(4), 2, 2 }, 824205987aSStefano Babic { pinmux(4), 2, 3 } 834205987aSStefano Babic }; 844205987aSStefano Babic 85f9fc237fSBastian Ruppert /* UART0 pin muxer settings */ 86649a33e4SStefano Babic static const struct pinmux_config uart_pins[] = { 87f9fc237fSBastian Ruppert { pinmux(3), 2, 7 }, 88f9fc237fSBastian Ruppert { pinmux(3), 2, 6 }, 89f9fc237fSBastian Ruppert { pinmux(3), 2, 4 }, 90f9fc237fSBastian Ruppert { pinmux(3), 2, 5 } 91649a33e4SStefano Babic }; 92649a33e4SStefano Babic 93649a33e4SStefano Babic #ifdef CONFIG_DRIVER_TI_EMAC 94649a33e4SStefano Babic #define HAS_RMII 1 95649a33e4SStefano Babic static const struct pinmux_config emac_pins[] = { 96649a33e4SStefano Babic { pinmux(14), 8, 2 }, 97649a33e4SStefano Babic { pinmux(14), 8, 3 }, 98649a33e4SStefano Babic { pinmux(14), 8, 4 }, 99649a33e4SStefano Babic { pinmux(14), 8, 5 }, 100649a33e4SStefano Babic { pinmux(14), 8, 6 }, 101649a33e4SStefano Babic { pinmux(14), 8, 7 }, 102649a33e4SStefano Babic { pinmux(15), 8, 1 }, 103649a33e4SStefano Babic { pinmux(4), 8, 0 }, 104649a33e4SStefano Babic { pinmux(4), 8, 1 } 105649a33e4SStefano Babic }; 106649a33e4SStefano Babic #endif 107649a33e4SStefano Babic 108649a33e4SStefano Babic #ifdef CONFIG_NAND_DAVINCI 109649a33e4SStefano Babic const struct pinmux_config nand_pins[] = { 11017a8904bSStefano Babic { pinmux(7), 1, 0}, /* CS2 */ 11117a8904bSStefano Babic { pinmux(7), 0, 1}, /* CS3 in three state*/ 11217a8904bSStefano Babic { pinmux(7), 1, 4 }, /* EMA_WE */ 11317a8904bSStefano Babic { pinmux(7), 1, 5 }, /* EMA_OE */ 11417a8904bSStefano Babic { pinmux(9), 1, 0 }, /* EMA_D[7] */ 11517a8904bSStefano Babic { pinmux(9), 1, 1 }, /* EMA_D[6] */ 11617a8904bSStefano Babic { pinmux(9), 1, 2 }, /* EMA_D[5] */ 11717a8904bSStefano Babic { pinmux(9), 1, 3 }, /* EMA_D[4] */ 11817a8904bSStefano Babic { pinmux(9), 1, 4 }, /* EMA_D[3] */ 11917a8904bSStefano Babic { pinmux(9), 1, 5 }, /* EMA_D[2] */ 12017a8904bSStefano Babic { pinmux(9), 1, 6 }, /* EMA_D[1] */ 12117a8904bSStefano Babic { pinmux(9), 1, 7 }, /* EMA_D[0] */ 12217a8904bSStefano Babic { pinmux(12), 1, 5 }, /* EMA_A[2] */ 12317a8904bSStefano Babic { pinmux(12), 1, 6 }, /* EMA_A[1] */ 12417a8904bSStefano Babic { pinmux(6), 1, 0 } /* EMA_CLK */ 125649a33e4SStefano Babic }; 126649a33e4SStefano Babic #endif 127649a33e4SStefano Babic 128ca1646b8SBastian Ruppert const struct pinmux_config gpio_pins[] = { 129ca1646b8SBastian Ruppert { pinmux(13), 8, 0 }, /* GPIO6[15] RESETOUTn on SOM*/ 130ca1646b8SBastian Ruppert { pinmux(13), 8, 5 }, /* GPIO6[10] U0_SW0 on EA20-00101_2*/ 1318540b169SBastian Ruppert { pinmux(13), 8, 3 }, /* GPIO6[12] U0_SW1 on EA20-00101_2*/ 1328540b169SBastian Ruppert { pinmux(19), 8, 5 }, /* GPIO6[1] DISP_ON */ 1338540b169SBastian Ruppert { pinmux(14), 8, 1 } /* GPIO6[6] LCD_B_PWR*/ 134ca1646b8SBastian Ruppert }; 135ca1646b8SBastian Ruppert 1363c891011SStefano Babic const struct pinmux_config lcd_pins[] = { 1373c891011SStefano Babic { pinmux(17), 2, 1 }, /* LCD_D_0 */ 1383c891011SStefano Babic { pinmux(17), 2, 0 }, /* LCD_D_1 */ 1393c891011SStefano Babic { pinmux(16), 2, 7 }, /* LCD_D_2 */ 1403c891011SStefano Babic { pinmux(16), 2, 6 }, /* LCD_D_3 */ 1413c891011SStefano Babic { pinmux(16), 2, 5 }, /* LCD_D_4 */ 1423c891011SStefano Babic { pinmux(16), 2, 4 }, /* LCD_D_5 */ 1433c891011SStefano Babic { pinmux(16), 2, 3 }, /* LCD_D_6 */ 1443c891011SStefano Babic { pinmux(16), 2, 2 }, /* LCD_D_7 */ 1453c891011SStefano Babic { pinmux(18), 2, 1 }, /* LCD_D_8 */ 1463c891011SStefano Babic { pinmux(18), 2, 0 }, /* LCD_D_9 */ 1473c891011SStefano Babic { pinmux(17), 2, 7 }, /* LCD_D_10 */ 1483c891011SStefano Babic { pinmux(17), 2, 6 }, /* LCD_D_11 */ 1493c891011SStefano Babic { pinmux(17), 2, 5 }, /* LCD_D_12 */ 1503c891011SStefano Babic { pinmux(17), 2, 4 }, /* LCD_D_13 */ 1513c891011SStefano Babic { pinmux(17), 2, 3 }, /* LCD_D_14 */ 1523c891011SStefano Babic { pinmux(17), 2, 2 }, /* LCD_D_15 */ 1533c891011SStefano Babic { pinmux(18), 2, 6 }, /* LCD_PCLK */ 1543c891011SStefano Babic { pinmux(19), 2, 0 }, /* LCD_HSYNC */ 1553c891011SStefano Babic { pinmux(19), 2, 1 }, /* LCD_VSYNC */ 1563c891011SStefano Babic { pinmux(19), 2, 6 }, /* DA850_NLCD_AC_ENB_CS */ 1573c891011SStefano Babic }; 1583c891011SStefano Babic 159e5ee9125SBastian Ruppert const struct pinmux_config halten_pin[] = { 160e5ee9125SBastian Ruppert { pinmux(3), 4, 2 } /* GPIO8[6] HALTEN */ 161e5ee9125SBastian Ruppert }; 162e5ee9125SBastian Ruppert 163649a33e4SStefano Babic static const struct pinmux_resource pinmuxes[] = { 164649a33e4SStefano Babic #ifdef CONFIG_SPI_FLASH 165649a33e4SStefano Babic PINMUX_ITEM(spi1_pins), 166649a33e4SStefano Babic #endif 167649a33e4SStefano Babic PINMUX_ITEM(uart_pins), 1684205987aSStefano Babic PINMUX_ITEM(i2c_pins), 169649a33e4SStefano Babic #ifdef CONFIG_NAND_DAVINCI 170649a33e4SStefano Babic PINMUX_ITEM(nand_pins), 171649a33e4SStefano Babic #endif 1723c891011SStefano Babic #ifdef CONFIG_VIDEO 1733c891011SStefano Babic PINMUX_ITEM(lcd_pins), 1743c891011SStefano Babic #endif 175649a33e4SStefano Babic }; 176649a33e4SStefano Babic 177649a33e4SStefano Babic static const struct lpsc_resource lpsc[] = { 178649a33e4SStefano Babic { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ 179649a33e4SStefano Babic { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ 180649a33e4SStefano Babic { DAVINCI_LPSC_EMAC }, /* image download */ 181f9fc237fSBastian Ruppert { DAVINCI_LPSC_UART0 }, /* console */ 182649a33e4SStefano Babic { DAVINCI_LPSC_GPIO }, 1833c891011SStefano Babic { DAVINCI_LPSC_LCDC }, /* LCD */ 184649a33e4SStefano Babic }; 185649a33e4SStefano Babic 1861c6ec6ddSStefano Babic int board_early_init_f(void) 187649a33e4SStefano Babic { 188ca1646b8SBastian Ruppert /* PinMux for GPIO */ 189ca1646b8SBastian Ruppert if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0) 190ca1646b8SBastian Ruppert return 1; 191ca1646b8SBastian Ruppert 192bdb04abeSBastian Ruppert /* Set DISP_ON high to enable LCD output*/ 193bdb04abeSBastian Ruppert gpio_direction_output(97, 1); 194bdb04abeSBastian Ruppert 195ca1646b8SBastian Ruppert /* Set the RESETOUTn low */ 1961441aa6aSStefano Babic gpio_direction_output(111, 0); 197ca1646b8SBastian Ruppert 198ca1646b8SBastian Ruppert /* Set U0_SW0 low for UART0 as console*/ 1991441aa6aSStefano Babic gpio_direction_output(106, 0); 200ca1646b8SBastian Ruppert 201ca1646b8SBastian Ruppert /* Set U0_SW1 low for UART0 as console*/ 2021441aa6aSStefano Babic gpio_direction_output(108, 0); 203ca1646b8SBastian Ruppert 2048540b169SBastian Ruppert /* Set LCD_B_PWR low to power down LCD Backlight*/ 2051441aa6aSStefano Babic gpio_direction_output(102, 0); 2068540b169SBastian Ruppert 207649a33e4SStefano Babic irq_init(); 208649a33e4SStefano Babic 209649a33e4SStefano Babic /* 210649a33e4SStefano Babic * NAND CS setup - cycle counts based on da850evm NAND timings in the 211649a33e4SStefano Babic * Linux kernel @ 25MHz EMIFA 212649a33e4SStefano Babic */ 21317a8904bSStefano Babic #ifdef CONFIG_NAND_DAVINCI 214649a33e4SStefano Babic writel((DAVINCI_ABCR_WSETUP(0) | 21517a8904bSStefano Babic DAVINCI_ABCR_WSTROBE(1) | 216649a33e4SStefano Babic DAVINCI_ABCR_WHOLD(0) | 217649a33e4SStefano Babic DAVINCI_ABCR_RSETUP(0) | 218649a33e4SStefano Babic DAVINCI_ABCR_RSTROBE(1) | 219649a33e4SStefano Babic DAVINCI_ABCR_RHOLD(0) | 220649a33e4SStefano Babic DAVINCI_ABCR_TA(0) | 221649a33e4SStefano Babic DAVINCI_ABCR_ASIZE_8BIT), 22217a8904bSStefano Babic &davinci_emif_regs->ab1cr); /* CS2 */ 223649a33e4SStefano Babic #endif 224649a33e4SStefano Babic 225649a33e4SStefano Babic /* 226649a33e4SStefano Babic * Power on required peripherals 227649a33e4SStefano Babic * ARM does not have access by default to PSC0 and PSC1 228649a33e4SStefano Babic * assuming here that the DSP bootloader has set the IOPU 229649a33e4SStefano Babic * such that PSC access is available to ARM 230649a33e4SStefano Babic */ 231649a33e4SStefano Babic if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) 232649a33e4SStefano Babic return 1; 233649a33e4SStefano Babic 234649a33e4SStefano Babic /* setup the SUSPSRC for ARM to control emulation suspend */ 235649a33e4SStefano Babic writel(readl(&davinci_syscfg_regs->suspsrc) & 236649a33e4SStefano Babic ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | 237649a33e4SStefano Babic DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | 238f9fc237fSBastian Ruppert DAVINCI_SYSCFG_SUSPSRC_UART0), 239649a33e4SStefano Babic &davinci_syscfg_regs->suspsrc); 240649a33e4SStefano Babic 241649a33e4SStefano Babic /* configure pinmux settings */ 242649a33e4SStefano Babic if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) 243649a33e4SStefano Babic return 1; 244649a33e4SStefano Babic 245649a33e4SStefano Babic #ifdef CONFIG_DRIVER_TI_EMAC 246649a33e4SStefano Babic if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0) 247649a33e4SStefano Babic return 1; 248649a33e4SStefano Babic 249649a33e4SStefano Babic davinci_emac_mii_mode_sel(HAS_RMII); 250649a33e4SStefano Babic #endif /* CONFIG_DRIVER_TI_EMAC */ 251649a33e4SStefano Babic 252649a33e4SStefano Babic /* enable the console UART */ 253649a33e4SStefano Babic writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | 254649a33e4SStefano Babic DAVINCI_UART_PWREMU_MGMT_UTRST), 255f9fc237fSBastian Ruppert &davinci_uart0_ctrl_regs->pwremu_mgmt); 256649a33e4SStefano Babic 2573c891011SStefano Babic /* 2583c891011SStefano Babic * Reconfigure the LCDC priority to the highest to ensure that 2593c891011SStefano Babic * the throughput/latency requirements for the LCDC are met. 2603c891011SStefano Babic */ 2613c891011SStefano Babic writel(readl(&davinci_syscfg_regs->mstpri[2]) & 0x0fffffff, 2623c891011SStefano Babic &davinci_syscfg_regs->mstpri[2]); 2633c891011SStefano Babic 2643c891011SStefano Babic 265649a33e4SStefano Babic return 0; 266649a33e4SStefano Babic } 267649a33e4SStefano Babic 26839e133d1SBastian Ruppert /* 26939e133d1SBastian Ruppert * Do not overwrite the console 27039e133d1SBastian Ruppert * Use always serial for U-Boot console 27139e133d1SBastian Ruppert */ 27239e133d1SBastian Ruppert int overwrite_console(void) 27339e133d1SBastian Ruppert { 27439e133d1SBastian Ruppert return 1; 27539e133d1SBastian Ruppert } 27639e133d1SBastian Ruppert 2771c6ec6ddSStefano Babic int board_init(void) 2781c6ec6ddSStefano Babic { 27994ba26f2STom Rini /* arch number of the board */ 28094ba26f2STom Rini gd->bd->bi_arch_number = MACH_TYPE_EA20; 28194ba26f2STom Rini 2821c6ec6ddSStefano Babic /* address of boot parameters */ 2831c6ec6ddSStefano Babic gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; 2841c6ec6ddSStefano Babic 285765f2f08SHeiko Schocher da8xx_video_init(&lcd_panel, &lcd_cfg, 16); 2863c891011SStefano Babic 2871c6ec6ddSStefano Babic return 0; 2881c6ec6ddSStefano Babic } 289e5ee9125SBastian Ruppert 2902d594fd5SNobuhiro Iwamatsu #ifdef CONFIG_BOARD_LATE_INIT 291e5ee9125SBastian Ruppert 292e5ee9125SBastian Ruppert int board_late_init(void) 293e5ee9125SBastian Ruppert { 294bdb04abeSBastian Ruppert unsigned char buf[2]; 295bdb04abeSBastian Ruppert int ret; 296bdb04abeSBastian Ruppert 297e5ee9125SBastian Ruppert /* PinMux for HALTEN */ 298e5ee9125SBastian Ruppert if (davinci_configure_pin_mux(halten_pin, ARRAY_SIZE(halten_pin)) != 0) 299e5ee9125SBastian Ruppert return 1; 300e5ee9125SBastian Ruppert 301e5ee9125SBastian Ruppert /* Set HALTEN to high */ 3021441aa6aSStefano Babic gpio_direction_output(134, 1); 303e5ee9125SBastian Ruppert 304bdb04abeSBastian Ruppert /* Set fixed contrast settings for LCD via I2C potentiometer */ 305bdb04abeSBastian Ruppert buf[0] = 0x00; 306bdb04abeSBastian Ruppert buf[1] = 0xd7; 307bdb04abeSBastian Ruppert ret = i2c_write(0x2e, 6, 1, buf, 2); 308bdb04abeSBastian Ruppert if (ret) 309bdb04abeSBastian Ruppert puts("\nContrast Settings FAILED\n"); 310bdb04abeSBastian Ruppert 311bdb04abeSBastian Ruppert /* Set LCD_B_PWR high to power up LCD Backlight*/ 312bdb04abeSBastian Ruppert gpio_set_value(102, 1); 313e5ee9125SBastian Ruppert return 0; 314e5ee9125SBastian Ruppert } 3152d594fd5SNobuhiro Iwamatsu #endif /* CONFIG_BOARD_LATE_INIT */ 316e5ee9125SBastian Ruppert 317649a33e4SStefano Babic #ifdef CONFIG_DRIVER_TI_EMAC 318649a33e4SStefano Babic 319649a33e4SStefano Babic /* 320649a33e4SStefano Babic * Initializes on-board ethernet controllers. 321649a33e4SStefano Babic */ 322649a33e4SStefano Babic int board_eth_init(bd_t *bis) 323649a33e4SStefano Babic { 324649a33e4SStefano Babic if (!davinci_emac_initialize()) { 325649a33e4SStefano Babic printf("Error: Ethernet init failed!\n"); 326649a33e4SStefano Babic return -1; 327649a33e4SStefano Babic } 328649a33e4SStefano Babic 329649a33e4SStefano Babic /* 330649a33e4SStefano Babic * This board has a RMII PHY. However, the MDC line on the SOM 331649a33e4SStefano Babic * must not be disabled (there is no MII PHY on the 332649a33e4SStefano Babic * baseboard) via the GPIO2[6], because this pin 333649a33e4SStefano Babic * disables at the same time the SPI flash. 334649a33e4SStefano Babic */ 335649a33e4SStefano Babic 336649a33e4SStefano Babic return 0; 337649a33e4SStefano Babic } 338649a33e4SStefano Babic #endif /* CONFIG_DRIVER_TI_EMAC */ 339