xref: /openbmc/u-boot/board/davinci/ea20/ea20.c (revision 3c891011)
1649a33e4SStefano Babic /*
2649a33e4SStefano Babic  * (C) Copyright 2010
3649a33e4SStefano Babic  * Stefano Babic, DENX Software Engineering, sbabic@denx.de
4649a33e4SStefano Babic  *
5649a33e4SStefano Babic  * Based on da850evm.c, original Copyrights follow:
6649a33e4SStefano Babic  *
7649a33e4SStefano Babic  * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
8649a33e4SStefano Babic  *
9649a33e4SStefano Babic  * Based on da830evm.c. Original Copyrights follow:
10649a33e4SStefano Babic  *
11649a33e4SStefano Babic  * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
12649a33e4SStefano Babic  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
13649a33e4SStefano Babic  *
14649a33e4SStefano Babic  * This program is free software; you can redistribute it and/or modify
15649a33e4SStefano Babic  * it under the terms of the GNU General Public License as published by
16649a33e4SStefano Babic  * the Free Software Foundation; either version 2 of the License, or
17649a33e4SStefano Babic  * (at your option) any later version.
18649a33e4SStefano Babic  *
19649a33e4SStefano Babic  * This program is distributed in the hope that it will be useful,
20649a33e4SStefano Babic  * but WITHOUT ANY WARRANTY; without even the implied warranty of
21649a33e4SStefano Babic  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
22649a33e4SStefano Babic  * GNU General Public License for more details.
23649a33e4SStefano Babic  *
24649a33e4SStefano Babic  * You should have received a copy of the GNU General Public License
25649a33e4SStefano Babic  * along with this program; if not, write to the Free Software
26649a33e4SStefano Babic  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27649a33e4SStefano Babic  */
28649a33e4SStefano Babic 
29649a33e4SStefano Babic #include <common.h>
30649a33e4SStefano Babic #include <i2c.h>
31649a33e4SStefano Babic #include <net.h>
32649a33e4SStefano Babic #include <netdev.h>
33649a33e4SStefano Babic #include <asm/arch/hardware.h>
34649a33e4SStefano Babic #include <asm/arch/emif_defs.h>
35649a33e4SStefano Babic #include <asm/arch/emac_defs.h>
36649a33e4SStefano Babic #include <asm/io.h>
37649a33e4SStefano Babic #include <asm/arch/davinci_misc.h>
38ca1646b8SBastian Ruppert #include <asm/arch/gpio.h>
39*3c891011SStefano Babic #include <asm/arch/da8xx-fb.h>
40649a33e4SStefano Babic 
41649a33e4SStefano Babic DECLARE_GLOBAL_DATA_PTR;
42649a33e4SStefano Babic 
43649a33e4SStefano Babic #define pinmux(x)	(&davinci_syscfg_regs->pinmux[x])
44649a33e4SStefano Babic 
45*3c891011SStefano Babic static const struct da8xx_panel lcd_panel = {
46*3c891011SStefano Babic 	/* Casio COM57H531x */
47*3c891011SStefano Babic 	.name = "Casio_COM57H531x",
48*3c891011SStefano Babic 	.width = 640,
49*3c891011SStefano Babic 	.height = 480,
50*3c891011SStefano Babic 	.hfp = 12,
51*3c891011SStefano Babic 	.hbp = 144,
52*3c891011SStefano Babic 	.hsw = 30,
53*3c891011SStefano Babic 	.vfp = 10,
54*3c891011SStefano Babic 	.vbp = 35,
55*3c891011SStefano Babic 	.vsw = 3,
56*3c891011SStefano Babic 	.pxl_clk = 25000000,
57*3c891011SStefano Babic 	.invert_pxl_clk = 0,
58*3c891011SStefano Babic };
59*3c891011SStefano Babic 
60649a33e4SStefano Babic /* SPI0 pin muxer settings */
61649a33e4SStefano Babic static const struct pinmux_config spi1_pins[] = {
62649a33e4SStefano Babic 	{ pinmux(5), 1, 1 },
63649a33e4SStefano Babic 	{ pinmux(5), 1, 2 },
64649a33e4SStefano Babic 	{ pinmux(5), 1, 4 },
65649a33e4SStefano Babic 	{ pinmux(5), 1, 5 }
66649a33e4SStefano Babic };
67649a33e4SStefano Babic 
68f9fc237fSBastian Ruppert /* UART0 pin muxer settings */
69649a33e4SStefano Babic static const struct pinmux_config uart_pins[] = {
70f9fc237fSBastian Ruppert 	{ pinmux(3), 2, 7 },
71f9fc237fSBastian Ruppert 	{ pinmux(3), 2, 6 },
72f9fc237fSBastian Ruppert 	{ pinmux(3), 2, 4 },
73f9fc237fSBastian Ruppert 	{ pinmux(3), 2, 5 }
74649a33e4SStefano Babic };
75649a33e4SStefano Babic 
76649a33e4SStefano Babic #ifdef CONFIG_DRIVER_TI_EMAC
77649a33e4SStefano Babic #define HAS_RMII 1
78649a33e4SStefano Babic static const struct pinmux_config emac_pins[] = {
79649a33e4SStefano Babic 	{ pinmux(14), 8, 2 },
80649a33e4SStefano Babic 	{ pinmux(14), 8, 3 },
81649a33e4SStefano Babic 	{ pinmux(14), 8, 4 },
82649a33e4SStefano Babic 	{ pinmux(14), 8, 5 },
83649a33e4SStefano Babic 	{ pinmux(14), 8, 6 },
84649a33e4SStefano Babic 	{ pinmux(14), 8, 7 },
85649a33e4SStefano Babic 	{ pinmux(15), 8, 1 },
86649a33e4SStefano Babic 	{ pinmux(4), 8, 0 },
87649a33e4SStefano Babic 	{ pinmux(4), 8, 1 }
88649a33e4SStefano Babic };
89649a33e4SStefano Babic #endif
90649a33e4SStefano Babic 
91649a33e4SStefano Babic #ifdef CONFIG_NAND_DAVINCI
92649a33e4SStefano Babic const struct pinmux_config nand_pins[] = {
9317a8904bSStefano Babic 	{ pinmux(7), 1, 0},	/* CS2 */
9417a8904bSStefano Babic 	{ pinmux(7), 0, 1},	/* CS3  in three state*/
9517a8904bSStefano Babic 	{ pinmux(7), 1, 4 },	/* EMA_WE */
9617a8904bSStefano Babic 	{ pinmux(7), 1, 5 },	/* EMA_OE */
9717a8904bSStefano Babic 	{ pinmux(9), 1, 0 },	/* EMA_D[7] */
9817a8904bSStefano Babic 	{ pinmux(9), 1, 1 },	/* EMA_D[6] */
9917a8904bSStefano Babic 	{ pinmux(9), 1, 2 },	/* EMA_D[5] */
10017a8904bSStefano Babic 	{ pinmux(9), 1, 3 },	/* EMA_D[4] */
10117a8904bSStefano Babic 	{ pinmux(9), 1, 4 },	/* EMA_D[3] */
10217a8904bSStefano Babic 	{ pinmux(9), 1, 5 },	/* EMA_D[2] */
10317a8904bSStefano Babic 	{ pinmux(9), 1, 6 },	/* EMA_D[1] */
10417a8904bSStefano Babic 	{ pinmux(9), 1, 7 },	/* EMA_D[0] */
10517a8904bSStefano Babic 	{ pinmux(12), 1, 5 },	/* EMA_A[2] */
10617a8904bSStefano Babic 	{ pinmux(12), 1, 6 },	/* EMA_A[1] */
10717a8904bSStefano Babic 	{ pinmux(6), 1, 0 }	/* EMA_CLK */
108649a33e4SStefano Babic };
109649a33e4SStefano Babic #endif
110649a33e4SStefano Babic 
111ca1646b8SBastian Ruppert const struct pinmux_config gpio_pins[] = {
112ca1646b8SBastian Ruppert 	{ pinmux(13), 8, 0 }, /* GPIO6[15] RESETOUTn on SOM*/
113ca1646b8SBastian Ruppert 	{ pinmux(13), 8, 5 }, /* GPIO6[10] U0_SW0 on EA20-00101_2*/
1148540b169SBastian Ruppert 	{ pinmux(13), 8, 3 }, /* GPIO6[12] U0_SW1 on EA20-00101_2*/
1158540b169SBastian Ruppert 	{ pinmux(19), 8, 5 }, /* GPIO6[1]  DISP_ON */
1168540b169SBastian Ruppert 	{ pinmux(14), 8, 1 }  /* GPIO6[6]  LCD_B_PWR*/
117ca1646b8SBastian Ruppert };
118ca1646b8SBastian Ruppert 
119*3c891011SStefano Babic const struct pinmux_config lcd_pins[] = {
120*3c891011SStefano Babic 	{ pinmux(17), 2, 1 }, /* LCD_D_0 */
121*3c891011SStefano Babic 	{ pinmux(17), 2, 0 }, /* LCD_D_1 */
122*3c891011SStefano Babic 	{ pinmux(16), 2, 7 }, /* LCD_D_2 */
123*3c891011SStefano Babic 	{ pinmux(16), 2, 6 }, /* LCD_D_3 */
124*3c891011SStefano Babic 	{ pinmux(16), 2, 5 }, /* LCD_D_4 */
125*3c891011SStefano Babic 	{ pinmux(16), 2, 4 }, /* LCD_D_5 */
126*3c891011SStefano Babic 	{ pinmux(16), 2, 3 }, /* LCD_D_6 */
127*3c891011SStefano Babic 	{ pinmux(16), 2, 2 }, /* LCD_D_7 */
128*3c891011SStefano Babic 	{ pinmux(18), 2, 1 }, /* LCD_D_8 */
129*3c891011SStefano Babic 	{ pinmux(18), 2, 0 }, /* LCD_D_9 */
130*3c891011SStefano Babic 	{ pinmux(17), 2, 7 }, /* LCD_D_10 */
131*3c891011SStefano Babic 	{ pinmux(17), 2, 6 }, /* LCD_D_11 */
132*3c891011SStefano Babic 	{ pinmux(17), 2, 5 }, /* LCD_D_12 */
133*3c891011SStefano Babic 	{ pinmux(17), 2, 4 }, /* LCD_D_13 */
134*3c891011SStefano Babic 	{ pinmux(17), 2, 3 }, /* LCD_D_14 */
135*3c891011SStefano Babic 	{ pinmux(17), 2, 2 }, /* LCD_D_15 */
136*3c891011SStefano Babic 	{ pinmux(18), 2, 6 }, /* LCD_PCLK */
137*3c891011SStefano Babic 	{ pinmux(19), 2, 0 }, /* LCD_HSYNC */
138*3c891011SStefano Babic 	{ pinmux(19), 2, 1 }, /* LCD_VSYNC */
139*3c891011SStefano Babic 	{ pinmux(19), 2, 6 }, /* DA850_NLCD_AC_ENB_CS */
140*3c891011SStefano Babic };
141*3c891011SStefano Babic 
142e5ee9125SBastian Ruppert const struct pinmux_config halten_pin[] = {
143e5ee9125SBastian Ruppert 	{ pinmux(3),  4, 2 } /* GPIO8[6] HALTEN */
144e5ee9125SBastian Ruppert };
145e5ee9125SBastian Ruppert 
146649a33e4SStefano Babic static const struct pinmux_resource pinmuxes[] = {
147649a33e4SStefano Babic #ifdef CONFIG_SPI_FLASH
148649a33e4SStefano Babic 	PINMUX_ITEM(spi1_pins),
149649a33e4SStefano Babic #endif
150649a33e4SStefano Babic 	PINMUX_ITEM(uart_pins),
151649a33e4SStefano Babic #ifdef CONFIG_NAND_DAVINCI
152649a33e4SStefano Babic 	PINMUX_ITEM(nand_pins),
153649a33e4SStefano Babic #endif
154*3c891011SStefano Babic #ifdef CONFIG_VIDEO
155*3c891011SStefano Babic 	PINMUX_ITEM(lcd_pins),
156*3c891011SStefano Babic #endif
157649a33e4SStefano Babic };
158649a33e4SStefano Babic 
159649a33e4SStefano Babic static const struct lpsc_resource lpsc[] = {
160649a33e4SStefano Babic 	{ DAVINCI_LPSC_AEMIF },	/* NAND, NOR */
161649a33e4SStefano Babic 	{ DAVINCI_LPSC_SPI1 },	/* Serial Flash */
162649a33e4SStefano Babic 	{ DAVINCI_LPSC_EMAC },	/* image download */
163f9fc237fSBastian Ruppert 	{ DAVINCI_LPSC_UART0 },	/* console */
164649a33e4SStefano Babic 	{ DAVINCI_LPSC_GPIO },
165*3c891011SStefano Babic 	{ DAVINCI_LPSC_LCDC }, /* LCD */
166649a33e4SStefano Babic };
167649a33e4SStefano Babic 
1681c6ec6ddSStefano Babic int board_early_init_f(void)
169649a33e4SStefano Babic {
170ca1646b8SBastian Ruppert 	struct davinci_gpio *gpio6_base =
171ca1646b8SBastian Ruppert 			(struct davinci_gpio *)DAVINCI_GPIO_BANK67;
172ca1646b8SBastian Ruppert 
173ca1646b8SBastian Ruppert 	/* PinMux for GPIO */
174ca1646b8SBastian Ruppert 	if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0)
175ca1646b8SBastian Ruppert 		return 1;
176ca1646b8SBastian Ruppert 
177ca1646b8SBastian Ruppert 	/* Set the RESETOUTn low */
178ca1646b8SBastian Ruppert 	writel((readl(&gpio6_base->set_data) & ~(1 << 15)),
179ca1646b8SBastian Ruppert 		&gpio6_base->set_data);
180ca1646b8SBastian Ruppert 	writel((readl(&gpio6_base->dir) & ~(1 << 15)), &gpio6_base->dir);
181ca1646b8SBastian Ruppert 
182ca1646b8SBastian Ruppert 	/* Set U0_SW0 low for UART0 as console*/
183ca1646b8SBastian Ruppert 	writel((readl(&gpio6_base->set_data) & ~(1 << 10)),
184ca1646b8SBastian Ruppert 		&gpio6_base->set_data);
185ca1646b8SBastian Ruppert 	writel((readl(&gpio6_base->dir) & ~(1 << 10)), &gpio6_base->dir);
186ca1646b8SBastian Ruppert 
187ca1646b8SBastian Ruppert 	/* Set U0_SW1 low for UART0 as console*/
188ca1646b8SBastian Ruppert 	writel((readl(&gpio6_base->set_data) & ~(1 << 12)),
189ca1646b8SBastian Ruppert 		&gpio6_base->set_data);
190ca1646b8SBastian Ruppert 	writel((readl(&gpio6_base->dir) & ~(1 << 12)), &gpio6_base->dir);
191ca1646b8SBastian Ruppert 
1928540b169SBastian Ruppert 	/* Set LCD_B_PWR low to power down LCD Backlight*/
1938540b169SBastian Ruppert 	writel((readl(&gpio6_base->set_data) & ~(1 << 6)),
1948540b169SBastian Ruppert 		&gpio6_base->set_data);
1958540b169SBastian Ruppert 	writel((readl(&gpio6_base->dir) & ~(1 << 6)), &gpio6_base->dir);
1968540b169SBastian Ruppert 
1978540b169SBastian Ruppert 	/* Set DISP_ON low to disable LCD output*/
1988540b169SBastian Ruppert 	writel((readl(&gpio6_base->set_data) & ~(1 << 1)),
1998540b169SBastian Ruppert 		&gpio6_base->set_data);
2008540b169SBastian Ruppert 	writel((readl(&gpio6_base->dir) & ~(1 << 1)), &gpio6_base->dir);
2018540b169SBastian Ruppert 
202649a33e4SStefano Babic #ifndef CONFIG_USE_IRQ
203649a33e4SStefano Babic 	irq_init();
204649a33e4SStefano Babic #endif
205649a33e4SStefano Babic 
206649a33e4SStefano Babic 	/*
207649a33e4SStefano Babic 	 * NAND CS setup - cycle counts based on da850evm NAND timings in the
208649a33e4SStefano Babic 	 * Linux kernel @ 25MHz EMIFA
209649a33e4SStefano Babic 	 */
21017a8904bSStefano Babic #ifdef CONFIG_NAND_DAVINCI
211649a33e4SStefano Babic 	writel((DAVINCI_ABCR_WSETUP(0) |
21217a8904bSStefano Babic 		DAVINCI_ABCR_WSTROBE(1) |
213649a33e4SStefano Babic 		DAVINCI_ABCR_WHOLD(0) |
214649a33e4SStefano Babic 		DAVINCI_ABCR_RSETUP(0) |
215649a33e4SStefano Babic 		DAVINCI_ABCR_RSTROBE(1) |
216649a33e4SStefano Babic 		DAVINCI_ABCR_RHOLD(0) |
217649a33e4SStefano Babic 		DAVINCI_ABCR_TA(0) |
218649a33e4SStefano Babic 		DAVINCI_ABCR_ASIZE_8BIT),
21917a8904bSStefano Babic 	       &davinci_emif_regs->ab1cr); /* CS2 */
220649a33e4SStefano Babic #endif
221649a33e4SStefano Babic 
222649a33e4SStefano Babic 	/*
223649a33e4SStefano Babic 	 * Power on required peripherals
224649a33e4SStefano Babic 	 * ARM does not have access by default to PSC0 and PSC1
225649a33e4SStefano Babic 	 * assuming here that the DSP bootloader has set the IOPU
226649a33e4SStefano Babic 	 * such that PSC access is available to ARM
227649a33e4SStefano Babic 	 */
228649a33e4SStefano Babic 	if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
229649a33e4SStefano Babic 		return 1;
230649a33e4SStefano Babic 
231649a33e4SStefano Babic 	/* setup the SUSPSRC for ARM to control emulation suspend */
232649a33e4SStefano Babic 	writel(readl(&davinci_syscfg_regs->suspsrc) &
233649a33e4SStefano Babic 	       ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
234649a33e4SStefano Babic 		 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
235f9fc237fSBastian Ruppert 		 DAVINCI_SYSCFG_SUSPSRC_UART0),
236649a33e4SStefano Babic 	       &davinci_syscfg_regs->suspsrc);
237649a33e4SStefano Babic 
238649a33e4SStefano Babic 	/* configure pinmux settings */
239649a33e4SStefano Babic 	if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
240649a33e4SStefano Babic 		return 1;
241649a33e4SStefano Babic 
242649a33e4SStefano Babic #ifdef CONFIG_DRIVER_TI_EMAC
243649a33e4SStefano Babic 	if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
244649a33e4SStefano Babic 		return 1;
245649a33e4SStefano Babic 
246649a33e4SStefano Babic 	davinci_emac_mii_mode_sel(HAS_RMII);
247649a33e4SStefano Babic #endif /* CONFIG_DRIVER_TI_EMAC */
248649a33e4SStefano Babic 
249649a33e4SStefano Babic 	/* enable the console UART */
250649a33e4SStefano Babic 	writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
251649a33e4SStefano Babic 		DAVINCI_UART_PWREMU_MGMT_UTRST),
252f9fc237fSBastian Ruppert 	       &davinci_uart0_ctrl_regs->pwremu_mgmt);
253649a33e4SStefano Babic 
254*3c891011SStefano Babic 	/*
255*3c891011SStefano Babic 	 * Reconfigure the LCDC priority to the highest to ensure that
256*3c891011SStefano Babic 	 * the throughput/latency requirements for the LCDC are met.
257*3c891011SStefano Babic 	 */
258*3c891011SStefano Babic 	writel(readl(&davinci_syscfg_regs->mstpri[2]) & 0x0fffffff,
259*3c891011SStefano Babic 	       &davinci_syscfg_regs->mstpri[2]);
260*3c891011SStefano Babic 
261*3c891011SStefano Babic 	/* Set LCD_B_PWR low to power up LCD Backlight*/
262*3c891011SStefano Babic 	writel((readl(&gpio6_base->set_data)  | (1 << 6)),
263*3c891011SStefano Babic 		&gpio6_base->set_data);
264*3c891011SStefano Babic 
265*3c891011SStefano Babic 	/* Set DISP_ON low to disable LCD output*/
266*3c891011SStefano Babic 	writel((readl(&gpio6_base->set_data) | (1 << 1)),
267*3c891011SStefano Babic 		&gpio6_base->set_data);
268*3c891011SStefano Babic 
269649a33e4SStefano Babic 	return 0;
270649a33e4SStefano Babic }
271649a33e4SStefano Babic 
2721c6ec6ddSStefano Babic int board_init(void)
2731c6ec6ddSStefano Babic {
2741c6ec6ddSStefano Babic 	/* arch number of the board */
2751c6ec6ddSStefano Babic 	gd->bd->bi_arch_number = MACH_TYPE_EA20;
2761c6ec6ddSStefano Babic 
2771c6ec6ddSStefano Babic 	/* address of boot parameters */
2781c6ec6ddSStefano Babic 	gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
2791c6ec6ddSStefano Babic 
280*3c891011SStefano Babic 	da8xx_video_init(&lcd_panel, 16);
281*3c891011SStefano Babic 
2821c6ec6ddSStefano Babic 	return 0;
2831c6ec6ddSStefano Babic }
284e5ee9125SBastian Ruppert 
285e5ee9125SBastian Ruppert #ifdef BOARD_LATE_INIT
286e5ee9125SBastian Ruppert 
287e5ee9125SBastian Ruppert int board_late_init(void)
288e5ee9125SBastian Ruppert {
289e5ee9125SBastian Ruppert 	struct davinci_gpio *gpio8_base =
290e5ee9125SBastian Ruppert 			(struct davinci_gpio *)DAVINCI_GPIO_BANK8;
291e5ee9125SBastian Ruppert 
292e5ee9125SBastian Ruppert 	/* PinMux for HALTEN */
293e5ee9125SBastian Ruppert 	if (davinci_configure_pin_mux(halten_pin, ARRAY_SIZE(halten_pin)) != 0)
294e5ee9125SBastian Ruppert 		return 1;
295e5ee9125SBastian Ruppert 
296e5ee9125SBastian Ruppert 	/* Set HALTEN to high */
297e5ee9125SBastian Ruppert 	writel((readl(&gpio8_base->set_data) | (1 << 6)),
298e5ee9125SBastian Ruppert 		&gpio8_base->set_data);
299e5ee9125SBastian Ruppert 	writel((readl(&gpio8_base->dir) & ~(1 << 6)), &gpio8_base->dir);
300e5ee9125SBastian Ruppert 
301*3c891011SStefano Babic 	setenv("stdout", "serial");
302*3c891011SStefano Babic 
303e5ee9125SBastian Ruppert 	return 0;
304e5ee9125SBastian Ruppert }
305e5ee9125SBastian Ruppert #endif /* BOARD_LATE_INIT */
306e5ee9125SBastian Ruppert 
307649a33e4SStefano Babic #ifdef CONFIG_DRIVER_TI_EMAC
308649a33e4SStefano Babic 
309649a33e4SStefano Babic /*
310649a33e4SStefano Babic  * Initializes on-board ethernet controllers.
311649a33e4SStefano Babic  */
312649a33e4SStefano Babic int board_eth_init(bd_t *bis)
313649a33e4SStefano Babic {
314649a33e4SStefano Babic 	if (!davinci_emac_initialize()) {
315649a33e4SStefano Babic 		printf("Error: Ethernet init failed!\n");
316649a33e4SStefano Babic 		return -1;
317649a33e4SStefano Babic 	}
318649a33e4SStefano Babic 
319649a33e4SStefano Babic 	/*
320649a33e4SStefano Babic 	 * This board has a RMII PHY. However, the MDC line on the SOM
321649a33e4SStefano Babic 	 * must not be disabled (there is no MII PHY on the
322649a33e4SStefano Babic 	 * baseboard) via the GPIO2[6], because this pin
323649a33e4SStefano Babic 	 * disables at the same time the SPI flash.
324649a33e4SStefano Babic 	 */
325649a33e4SStefano Babic 
326649a33e4SStefano Babic 	return 0;
327649a33e4SStefano Babic }
328649a33e4SStefano Babic #endif /* CONFIG_DRIVER_TI_EMAC */
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