1649a33e4SStefano Babic /* 2649a33e4SStefano Babic * (C) Copyright 2010 3649a33e4SStefano Babic * Stefano Babic, DENX Software Engineering, sbabic@denx.de 4649a33e4SStefano Babic * 5649a33e4SStefano Babic * Based on da850evm.c, original Copyrights follow: 6649a33e4SStefano Babic * 7649a33e4SStefano Babic * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 8649a33e4SStefano Babic * 9649a33e4SStefano Babic * Based on da830evm.c. Original Copyrights follow: 10649a33e4SStefano Babic * 11649a33e4SStefano Babic * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> 12649a33e4SStefano Babic * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> 13649a33e4SStefano Babic * 14649a33e4SStefano Babic * This program is free software; you can redistribute it and/or modify 15649a33e4SStefano Babic * it under the terms of the GNU General Public License as published by 16649a33e4SStefano Babic * the Free Software Foundation; either version 2 of the License, or 17649a33e4SStefano Babic * (at your option) any later version. 18649a33e4SStefano Babic * 19649a33e4SStefano Babic * This program is distributed in the hope that it will be useful, 20649a33e4SStefano Babic * but WITHOUT ANY WARRANTY; without even the implied warranty of 21649a33e4SStefano Babic * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 22649a33e4SStefano Babic * GNU General Public License for more details. 23649a33e4SStefano Babic * 24649a33e4SStefano Babic * You should have received a copy of the GNU General Public License 25649a33e4SStefano Babic * along with this program; if not, write to the Free Software 26649a33e4SStefano Babic * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 27649a33e4SStefano Babic */ 28649a33e4SStefano Babic 29649a33e4SStefano Babic #include <common.h> 30649a33e4SStefano Babic #include <i2c.h> 31649a33e4SStefano Babic #include <net.h> 32649a33e4SStefano Babic #include <netdev.h> 33649a33e4SStefano Babic #include <asm/arch/hardware.h> 34649a33e4SStefano Babic #include <asm/arch/emif_defs.h> 35649a33e4SStefano Babic #include <asm/arch/emac_defs.h> 36649a33e4SStefano Babic #include <asm/io.h> 37649a33e4SStefano Babic #include <asm/arch/davinci_misc.h> 38*1441aa6aSStefano Babic #include <asm/gpio.h> 393c891011SStefano Babic #include <asm/arch/da8xx-fb.h> 40649a33e4SStefano Babic 41649a33e4SStefano Babic DECLARE_GLOBAL_DATA_PTR; 42649a33e4SStefano Babic 433c891011SStefano Babic static const struct da8xx_panel lcd_panel = { 443c891011SStefano Babic /* Casio COM57H531x */ 453c891011SStefano Babic .name = "Casio_COM57H531x", 463c891011SStefano Babic .width = 640, 473c891011SStefano Babic .height = 480, 483c891011SStefano Babic .hfp = 12, 493c891011SStefano Babic .hbp = 144, 503c891011SStefano Babic .hsw = 30, 513c891011SStefano Babic .vfp = 10, 523c891011SStefano Babic .vbp = 35, 533c891011SStefano Babic .vsw = 3, 543c891011SStefano Babic .pxl_clk = 25000000, 553c891011SStefano Babic .invert_pxl_clk = 0, 563c891011SStefano Babic }; 573c891011SStefano Babic 58649a33e4SStefano Babic /* SPI0 pin muxer settings */ 59649a33e4SStefano Babic static const struct pinmux_config spi1_pins[] = { 60649a33e4SStefano Babic { pinmux(5), 1, 1 }, 61649a33e4SStefano Babic { pinmux(5), 1, 2 }, 62649a33e4SStefano Babic { pinmux(5), 1, 4 }, 63649a33e4SStefano Babic { pinmux(5), 1, 5 } 64649a33e4SStefano Babic }; 65649a33e4SStefano Babic 664205987aSStefano Babic /* I2C pin muxer settings */ 674205987aSStefano Babic static const struct pinmux_config i2c_pins[] = { 684205987aSStefano Babic { pinmux(4), 2, 2 }, 694205987aSStefano Babic { pinmux(4), 2, 3 } 704205987aSStefano Babic }; 714205987aSStefano Babic 72f9fc237fSBastian Ruppert /* UART0 pin muxer settings */ 73649a33e4SStefano Babic static const struct pinmux_config uart_pins[] = { 74f9fc237fSBastian Ruppert { pinmux(3), 2, 7 }, 75f9fc237fSBastian Ruppert { pinmux(3), 2, 6 }, 76f9fc237fSBastian Ruppert { pinmux(3), 2, 4 }, 77f9fc237fSBastian Ruppert { pinmux(3), 2, 5 } 78649a33e4SStefano Babic }; 79649a33e4SStefano Babic 80649a33e4SStefano Babic #ifdef CONFIG_DRIVER_TI_EMAC 81649a33e4SStefano Babic #define HAS_RMII 1 82649a33e4SStefano Babic static const struct pinmux_config emac_pins[] = { 83649a33e4SStefano Babic { pinmux(14), 8, 2 }, 84649a33e4SStefano Babic { pinmux(14), 8, 3 }, 85649a33e4SStefano Babic { pinmux(14), 8, 4 }, 86649a33e4SStefano Babic { pinmux(14), 8, 5 }, 87649a33e4SStefano Babic { pinmux(14), 8, 6 }, 88649a33e4SStefano Babic { pinmux(14), 8, 7 }, 89649a33e4SStefano Babic { pinmux(15), 8, 1 }, 90649a33e4SStefano Babic { pinmux(4), 8, 0 }, 91649a33e4SStefano Babic { pinmux(4), 8, 1 } 92649a33e4SStefano Babic }; 93649a33e4SStefano Babic #endif 94649a33e4SStefano Babic 95649a33e4SStefano Babic #ifdef CONFIG_NAND_DAVINCI 96649a33e4SStefano Babic const struct pinmux_config nand_pins[] = { 9717a8904bSStefano Babic { pinmux(7), 1, 0}, /* CS2 */ 9817a8904bSStefano Babic { pinmux(7), 0, 1}, /* CS3 in three state*/ 9917a8904bSStefano Babic { pinmux(7), 1, 4 }, /* EMA_WE */ 10017a8904bSStefano Babic { pinmux(7), 1, 5 }, /* EMA_OE */ 10117a8904bSStefano Babic { pinmux(9), 1, 0 }, /* EMA_D[7] */ 10217a8904bSStefano Babic { pinmux(9), 1, 1 }, /* EMA_D[6] */ 10317a8904bSStefano Babic { pinmux(9), 1, 2 }, /* EMA_D[5] */ 10417a8904bSStefano Babic { pinmux(9), 1, 3 }, /* EMA_D[4] */ 10517a8904bSStefano Babic { pinmux(9), 1, 4 }, /* EMA_D[3] */ 10617a8904bSStefano Babic { pinmux(9), 1, 5 }, /* EMA_D[2] */ 10717a8904bSStefano Babic { pinmux(9), 1, 6 }, /* EMA_D[1] */ 10817a8904bSStefano Babic { pinmux(9), 1, 7 }, /* EMA_D[0] */ 10917a8904bSStefano Babic { pinmux(12), 1, 5 }, /* EMA_A[2] */ 11017a8904bSStefano Babic { pinmux(12), 1, 6 }, /* EMA_A[1] */ 11117a8904bSStefano Babic { pinmux(6), 1, 0 } /* EMA_CLK */ 112649a33e4SStefano Babic }; 113649a33e4SStefano Babic #endif 114649a33e4SStefano Babic 115ca1646b8SBastian Ruppert const struct pinmux_config gpio_pins[] = { 116ca1646b8SBastian Ruppert { pinmux(13), 8, 0 }, /* GPIO6[15] RESETOUTn on SOM*/ 117ca1646b8SBastian Ruppert { pinmux(13), 8, 5 }, /* GPIO6[10] U0_SW0 on EA20-00101_2*/ 1188540b169SBastian Ruppert { pinmux(13), 8, 3 }, /* GPIO6[12] U0_SW1 on EA20-00101_2*/ 1198540b169SBastian Ruppert { pinmux(19), 8, 5 }, /* GPIO6[1] DISP_ON */ 1208540b169SBastian Ruppert { pinmux(14), 8, 1 } /* GPIO6[6] LCD_B_PWR*/ 121ca1646b8SBastian Ruppert }; 122ca1646b8SBastian Ruppert 1233c891011SStefano Babic const struct pinmux_config lcd_pins[] = { 1243c891011SStefano Babic { pinmux(17), 2, 1 }, /* LCD_D_0 */ 1253c891011SStefano Babic { pinmux(17), 2, 0 }, /* LCD_D_1 */ 1263c891011SStefano Babic { pinmux(16), 2, 7 }, /* LCD_D_2 */ 1273c891011SStefano Babic { pinmux(16), 2, 6 }, /* LCD_D_3 */ 1283c891011SStefano Babic { pinmux(16), 2, 5 }, /* LCD_D_4 */ 1293c891011SStefano Babic { pinmux(16), 2, 4 }, /* LCD_D_5 */ 1303c891011SStefano Babic { pinmux(16), 2, 3 }, /* LCD_D_6 */ 1313c891011SStefano Babic { pinmux(16), 2, 2 }, /* LCD_D_7 */ 1323c891011SStefano Babic { pinmux(18), 2, 1 }, /* LCD_D_8 */ 1333c891011SStefano Babic { pinmux(18), 2, 0 }, /* LCD_D_9 */ 1343c891011SStefano Babic { pinmux(17), 2, 7 }, /* LCD_D_10 */ 1353c891011SStefano Babic { pinmux(17), 2, 6 }, /* LCD_D_11 */ 1363c891011SStefano Babic { pinmux(17), 2, 5 }, /* LCD_D_12 */ 1373c891011SStefano Babic { pinmux(17), 2, 4 }, /* LCD_D_13 */ 1383c891011SStefano Babic { pinmux(17), 2, 3 }, /* LCD_D_14 */ 1393c891011SStefano Babic { pinmux(17), 2, 2 }, /* LCD_D_15 */ 1403c891011SStefano Babic { pinmux(18), 2, 6 }, /* LCD_PCLK */ 1413c891011SStefano Babic { pinmux(19), 2, 0 }, /* LCD_HSYNC */ 1423c891011SStefano Babic { pinmux(19), 2, 1 }, /* LCD_VSYNC */ 1433c891011SStefano Babic { pinmux(19), 2, 6 }, /* DA850_NLCD_AC_ENB_CS */ 1443c891011SStefano Babic }; 1453c891011SStefano Babic 146e5ee9125SBastian Ruppert const struct pinmux_config halten_pin[] = { 147e5ee9125SBastian Ruppert { pinmux(3), 4, 2 } /* GPIO8[6] HALTEN */ 148e5ee9125SBastian Ruppert }; 149e5ee9125SBastian Ruppert 150649a33e4SStefano Babic static const struct pinmux_resource pinmuxes[] = { 151649a33e4SStefano Babic #ifdef CONFIG_SPI_FLASH 152649a33e4SStefano Babic PINMUX_ITEM(spi1_pins), 153649a33e4SStefano Babic #endif 154649a33e4SStefano Babic PINMUX_ITEM(uart_pins), 1554205987aSStefano Babic PINMUX_ITEM(i2c_pins), 156649a33e4SStefano Babic #ifdef CONFIG_NAND_DAVINCI 157649a33e4SStefano Babic PINMUX_ITEM(nand_pins), 158649a33e4SStefano Babic #endif 1593c891011SStefano Babic #ifdef CONFIG_VIDEO 1603c891011SStefano Babic PINMUX_ITEM(lcd_pins), 1613c891011SStefano Babic #endif 162649a33e4SStefano Babic }; 163649a33e4SStefano Babic 164649a33e4SStefano Babic static const struct lpsc_resource lpsc[] = { 165649a33e4SStefano Babic { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ 166649a33e4SStefano Babic { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ 167649a33e4SStefano Babic { DAVINCI_LPSC_EMAC }, /* image download */ 168f9fc237fSBastian Ruppert { DAVINCI_LPSC_UART0 }, /* console */ 169649a33e4SStefano Babic { DAVINCI_LPSC_GPIO }, 1703c891011SStefano Babic { DAVINCI_LPSC_LCDC }, /* LCD */ 171649a33e4SStefano Babic }; 172649a33e4SStefano Babic 1731c6ec6ddSStefano Babic int board_early_init_f(void) 174649a33e4SStefano Babic { 175ca1646b8SBastian Ruppert /* PinMux for GPIO */ 176ca1646b8SBastian Ruppert if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0) 177ca1646b8SBastian Ruppert return 1; 178ca1646b8SBastian Ruppert 179ca1646b8SBastian Ruppert /* Set the RESETOUTn low */ 180*1441aa6aSStefano Babic gpio_direction_output(111, 0); 181ca1646b8SBastian Ruppert 182ca1646b8SBastian Ruppert /* Set U0_SW0 low for UART0 as console*/ 183*1441aa6aSStefano Babic gpio_direction_output(106, 0); 184ca1646b8SBastian Ruppert 185ca1646b8SBastian Ruppert /* Set U0_SW1 low for UART0 as console*/ 186*1441aa6aSStefano Babic gpio_direction_output(108, 0); 187ca1646b8SBastian Ruppert 1888540b169SBastian Ruppert /* Set LCD_B_PWR low to power down LCD Backlight*/ 189*1441aa6aSStefano Babic gpio_direction_output(102, 0); 1908540b169SBastian Ruppert 1918540b169SBastian Ruppert /* Set DISP_ON low to disable LCD output*/ 192*1441aa6aSStefano Babic gpio_direction_output(97, 0); 1938540b169SBastian Ruppert 194649a33e4SStefano Babic #ifndef CONFIG_USE_IRQ 195649a33e4SStefano Babic irq_init(); 196649a33e4SStefano Babic #endif 197649a33e4SStefano Babic 198649a33e4SStefano Babic /* 199649a33e4SStefano Babic * NAND CS setup - cycle counts based on da850evm NAND timings in the 200649a33e4SStefano Babic * Linux kernel @ 25MHz EMIFA 201649a33e4SStefano Babic */ 20217a8904bSStefano Babic #ifdef CONFIG_NAND_DAVINCI 203649a33e4SStefano Babic writel((DAVINCI_ABCR_WSETUP(0) | 20417a8904bSStefano Babic DAVINCI_ABCR_WSTROBE(1) | 205649a33e4SStefano Babic DAVINCI_ABCR_WHOLD(0) | 206649a33e4SStefano Babic DAVINCI_ABCR_RSETUP(0) | 207649a33e4SStefano Babic DAVINCI_ABCR_RSTROBE(1) | 208649a33e4SStefano Babic DAVINCI_ABCR_RHOLD(0) | 209649a33e4SStefano Babic DAVINCI_ABCR_TA(0) | 210649a33e4SStefano Babic DAVINCI_ABCR_ASIZE_8BIT), 21117a8904bSStefano Babic &davinci_emif_regs->ab1cr); /* CS2 */ 212649a33e4SStefano Babic #endif 213649a33e4SStefano Babic 214649a33e4SStefano Babic /* 215649a33e4SStefano Babic * Power on required peripherals 216649a33e4SStefano Babic * ARM does not have access by default to PSC0 and PSC1 217649a33e4SStefano Babic * assuming here that the DSP bootloader has set the IOPU 218649a33e4SStefano Babic * such that PSC access is available to ARM 219649a33e4SStefano Babic */ 220649a33e4SStefano Babic if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) 221649a33e4SStefano Babic return 1; 222649a33e4SStefano Babic 223649a33e4SStefano Babic /* setup the SUSPSRC for ARM to control emulation suspend */ 224649a33e4SStefano Babic writel(readl(&davinci_syscfg_regs->suspsrc) & 225649a33e4SStefano Babic ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | 226649a33e4SStefano Babic DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | 227f9fc237fSBastian Ruppert DAVINCI_SYSCFG_SUSPSRC_UART0), 228649a33e4SStefano Babic &davinci_syscfg_regs->suspsrc); 229649a33e4SStefano Babic 230649a33e4SStefano Babic /* configure pinmux settings */ 231649a33e4SStefano Babic if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) 232649a33e4SStefano Babic return 1; 233649a33e4SStefano Babic 234649a33e4SStefano Babic #ifdef CONFIG_DRIVER_TI_EMAC 235649a33e4SStefano Babic if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0) 236649a33e4SStefano Babic return 1; 237649a33e4SStefano Babic 238649a33e4SStefano Babic davinci_emac_mii_mode_sel(HAS_RMII); 239649a33e4SStefano Babic #endif /* CONFIG_DRIVER_TI_EMAC */ 240649a33e4SStefano Babic 241649a33e4SStefano Babic /* enable the console UART */ 242649a33e4SStefano Babic writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | 243649a33e4SStefano Babic DAVINCI_UART_PWREMU_MGMT_UTRST), 244f9fc237fSBastian Ruppert &davinci_uart0_ctrl_regs->pwremu_mgmt); 245649a33e4SStefano Babic 2463c891011SStefano Babic /* 2473c891011SStefano Babic * Reconfigure the LCDC priority to the highest to ensure that 2483c891011SStefano Babic * the throughput/latency requirements for the LCDC are met. 2493c891011SStefano Babic */ 2503c891011SStefano Babic writel(readl(&davinci_syscfg_regs->mstpri[2]) & 0x0fffffff, 2513c891011SStefano Babic &davinci_syscfg_regs->mstpri[2]); 2523c891011SStefano Babic 2533c891011SStefano Babic /* Set LCD_B_PWR low to power up LCD Backlight*/ 254*1441aa6aSStefano Babic gpio_set_value(102, 1); 2553c891011SStefano Babic 2563c891011SStefano Babic /* Set DISP_ON low to disable LCD output*/ 257*1441aa6aSStefano Babic gpio_set_value(97, 1); 2583c891011SStefano Babic 259649a33e4SStefano Babic return 0; 260649a33e4SStefano Babic } 261649a33e4SStefano Babic 2621c6ec6ddSStefano Babic int board_init(void) 2631c6ec6ddSStefano Babic { 2641c6ec6ddSStefano Babic /* arch number of the board */ 2651c6ec6ddSStefano Babic gd->bd->bi_arch_number = MACH_TYPE_EA20; 2661c6ec6ddSStefano Babic 2671c6ec6ddSStefano Babic /* address of boot parameters */ 2681c6ec6ddSStefano Babic gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; 2691c6ec6ddSStefano Babic 2703c891011SStefano Babic da8xx_video_init(&lcd_panel, 16); 2713c891011SStefano Babic 2721c6ec6ddSStefano Babic return 0; 2731c6ec6ddSStefano Babic } 274e5ee9125SBastian Ruppert 275e5ee9125SBastian Ruppert #ifdef BOARD_LATE_INIT 276e5ee9125SBastian Ruppert 277e5ee9125SBastian Ruppert int board_late_init(void) 278e5ee9125SBastian Ruppert { 279e5ee9125SBastian Ruppert /* PinMux for HALTEN */ 280e5ee9125SBastian Ruppert if (davinci_configure_pin_mux(halten_pin, ARRAY_SIZE(halten_pin)) != 0) 281e5ee9125SBastian Ruppert return 1; 282e5ee9125SBastian Ruppert 283e5ee9125SBastian Ruppert /* Set HALTEN to high */ 284*1441aa6aSStefano Babic gpio_direction_output(134, 1); 285e5ee9125SBastian Ruppert 2863c891011SStefano Babic setenv("stdout", "serial"); 2873c891011SStefano Babic 288e5ee9125SBastian Ruppert return 0; 289e5ee9125SBastian Ruppert } 290e5ee9125SBastian Ruppert #endif /* BOARD_LATE_INIT */ 291e5ee9125SBastian Ruppert 292649a33e4SStefano Babic #ifdef CONFIG_DRIVER_TI_EMAC 293649a33e4SStefano Babic 294649a33e4SStefano Babic /* 295649a33e4SStefano Babic * Initializes on-board ethernet controllers. 296649a33e4SStefano Babic */ 297649a33e4SStefano Babic int board_eth_init(bd_t *bis) 298649a33e4SStefano Babic { 299649a33e4SStefano Babic if (!davinci_emac_initialize()) { 300649a33e4SStefano Babic printf("Error: Ethernet init failed!\n"); 301649a33e4SStefano Babic return -1; 302649a33e4SStefano Babic } 303649a33e4SStefano Babic 304649a33e4SStefano Babic /* 305649a33e4SStefano Babic * This board has a RMII PHY. However, the MDC line on the SOM 306649a33e4SStefano Babic * must not be disabled (there is no MII PHY on the 307649a33e4SStefano Babic * baseboard) via the GPIO2[6], because this pin 308649a33e4SStefano Babic * disables at the same time the SPI flash. 309649a33e4SStefano Babic */ 310649a33e4SStefano Babic 311649a33e4SStefano Babic return 0; 312649a33e4SStefano Babic } 313649a33e4SStefano Babic #endif /* CONFIG_DRIVER_TI_EMAC */ 314