1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 4 * 5 * Based on da830evm.c. Original Copyrights follow: 6 * 7 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> 8 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> 9 */ 10 11 #include <common.h> 12 #include <dm.h> 13 #include <environment.h> 14 #include <i2c.h> 15 #include <net.h> 16 #include <netdev.h> 17 #include <spi.h> 18 #include <spi_flash.h> 19 #include <asm/arch/hardware.h> 20 #include <asm/ti-common/davinci_nand.h> 21 #include <asm/arch/emac_defs.h> 22 #include <asm/arch/pinmux_defs.h> 23 #include <asm/io.h> 24 #include <asm/arch/davinci_misc.h> 25 #include <linux/errno.h> 26 #include <hwconfig.h> 27 #include <asm/mach-types.h> 28 #include <asm/gpio.h> 29 30 #ifdef CONFIG_MMC_DAVINCI 31 #include <mmc.h> 32 #include <asm/arch/sdmmc_defs.h> 33 #endif 34 35 DECLARE_GLOBAL_DATA_PTR; 36 37 #ifdef CONFIG_DRIVER_TI_EMAC 38 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII 39 #define HAS_RMII 1 40 #else 41 #define HAS_RMII 0 42 #endif 43 #endif /* CONFIG_DRIVER_TI_EMAC */ 44 45 #define CFG_MAC_ADDR_SPI_BUS 0 46 #define CFG_MAC_ADDR_SPI_CS 0 47 #define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 48 #define CFG_MAC_ADDR_SPI_MODE SPI_MODE_3 49 50 #define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K) 51 52 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH 53 static int get_mac_addr(u8 *addr) 54 { 55 struct spi_flash *flash; 56 int ret; 57 58 flash = spi_flash_probe(CFG_MAC_ADDR_SPI_BUS, CFG_MAC_ADDR_SPI_CS, 59 CFG_MAC_ADDR_SPI_MAX_HZ, CFG_MAC_ADDR_SPI_MODE); 60 if (!flash) { 61 printf("Error - unable to probe SPI flash.\n"); 62 return -1; 63 } 64 65 ret = spi_flash_read(flash, (CFG_MAC_ADDR_OFFSET) + 1, 7, addr); 66 if (ret) { 67 printf("Error - unable to read MAC address from SPI flash.\n"); 68 return -1; 69 } 70 71 return ret; 72 } 73 #endif 74 75 void dsp_lpsc_on(unsigned domain, unsigned int id) 76 { 77 dv_reg_p mdstat, mdctl, ptstat, ptcmd; 78 struct davinci_psc_regs *psc_regs; 79 80 psc_regs = davinci_psc0_regs; 81 mdstat = &psc_regs->psc0.mdstat[id]; 82 mdctl = &psc_regs->psc0.mdctl[id]; 83 ptstat = &psc_regs->ptstat; 84 ptcmd = &psc_regs->ptcmd; 85 86 while (*ptstat & (0x1 << domain)) 87 ; 88 89 if ((*mdstat & 0x1f) == 0x03) 90 return; /* Already on and enabled */ 91 92 *mdctl |= 0x03; 93 94 *ptcmd = 0x1 << domain; 95 96 while (*ptstat & (0x1 << domain)) 97 ; 98 while ((*mdstat & 0x1f) != 0x03) 99 ; /* Probably an overkill... */ 100 } 101 102 static void dspwake(void) 103 { 104 unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE; 105 u32 val; 106 107 /* if the device is ARM only, return */ 108 if ((readl(CHIP_REV_ID_REG) & 0x3f) == 0x10) 109 return; 110 111 if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL)) 112 return; 113 114 *resetvect++ = 0x1E000; /* DSP Idle */ 115 /* clear out the next 10 words as NOP */ 116 memset(resetvect, 0, sizeof(unsigned) *10); 117 118 /* setup the DSP reset vector */ 119 writel(DAVINCI_L3CBARAM_BASE, HOST1CFG); 120 121 dsp_lpsc_on(1, DAVINCI_LPSC_GEM); 122 val = readl(PSC0_MDCTL + (15 * 4)); 123 val |= 0x100; 124 writel(val, (PSC0_MDCTL + (15 * 4))); 125 } 126 127 int misc_init_r(void) 128 { 129 dspwake(); 130 131 #if defined(CONFIG_MAC_ADDR_IN_SPIFLASH) || defined(CONFIG_MAC_ADDR_IN_EEPROM) 132 133 uchar env_enetaddr[6]; 134 int enetaddr_found; 135 136 enetaddr_found = eth_env_get_enetaddr("ethaddr", env_enetaddr); 137 138 #endif 139 140 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH 141 int spi_mac_read; 142 uchar buff[6]; 143 144 spi_mac_read = get_mac_addr(buff); 145 buff[0] = 0; 146 147 /* 148 * MAC address not present in the environment 149 * try and read the MAC address from SPI flash 150 * and set it. 151 */ 152 if (!enetaddr_found) { 153 if (!spi_mac_read) { 154 if (is_valid_ethaddr(buff)) { 155 if (eth_env_set_enetaddr("ethaddr", buff)) { 156 printf("Warning: Failed to " 157 "set MAC address from SPI flash\n"); 158 } 159 } else { 160 printf("Warning: Invalid " 161 "MAC address read from SPI flash\n"); 162 } 163 } 164 } else { 165 /* 166 * MAC address present in environment compare it with 167 * the MAC address in SPI flash and warn on mismatch 168 */ 169 if (!spi_mac_read && is_valid_ethaddr(buff) && 170 memcmp(env_enetaddr, buff, 6)) 171 printf("Warning: MAC address in SPI flash don't match " 172 "with the MAC address in the environment\n"); 173 printf("Default using MAC address from environment\n"); 174 } 175 176 #elif defined(CONFIG_MAC_ADDR_IN_EEPROM) 177 uint8_t enetaddr[8]; 178 int eeprom_mac_read; 179 180 /* Read Ethernet MAC address from EEPROM */ 181 eeprom_mac_read = dvevm_read_mac_address(enetaddr); 182 183 /* 184 * MAC address not present in the environment 185 * try and read the MAC address from EEPROM flash 186 * and set it. 187 */ 188 if (!enetaddr_found) { 189 if (eeprom_mac_read) 190 /* Set Ethernet MAC address from EEPROM */ 191 davinci_sync_env_enetaddr(enetaddr); 192 } else { 193 /* 194 * MAC address present in environment compare it with 195 * the MAC address in EEPROM and warn on mismatch 196 */ 197 if (eeprom_mac_read && memcmp(enetaddr, env_enetaddr, 6)) 198 printf("Warning: MAC address in EEPROM don't match " 199 "with the MAC address in the environment\n"); 200 printf("Default using MAC address from environment\n"); 201 } 202 203 #endif 204 return 0; 205 } 206 207 #ifdef CONFIG_MMC_DAVINCI 208 static struct davinci_mmc mmc_sd0 = { 209 .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE, 210 .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */ 211 .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, 212 .version = MMC_CTLR_VERSION_2, 213 }; 214 215 int board_mmc_init(bd_t *bis) 216 { 217 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID); 218 219 /* Add slot-0 to mmc subsystem */ 220 return davinci_mmc_init(bis, &mmc_sd0); 221 } 222 #endif 223 224 static const struct pinmux_config gpio_pins[] = { 225 #ifdef CONFIG_USE_NOR 226 /* GP0[11] is required for NOR to work on Rev 3 EVMs */ 227 { pinmux(0), 8, 4 }, /* GP0[11] */ 228 #endif 229 #ifdef CONFIG_MMC_DAVINCI 230 /* GP0[11] is required for SD to work on Rev 3 EVMs */ 231 { pinmux(0), 8, 4 }, /* GP0[11] */ 232 #endif 233 }; 234 235 const struct pinmux_resource pinmuxes[] = { 236 #ifdef CONFIG_DRIVER_TI_EMAC 237 PINMUX_ITEM(emac_pins_mdio), 238 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII 239 PINMUX_ITEM(emac_pins_rmii), 240 #else 241 PINMUX_ITEM(emac_pins_mii), 242 #endif 243 #endif 244 #ifdef CONFIG_SPI_FLASH 245 PINMUX_ITEM(spi1_pins_base), 246 PINMUX_ITEM(spi1_pins_scs0), 247 #endif 248 PINMUX_ITEM(uart2_pins_txrx), 249 PINMUX_ITEM(uart2_pins_rtscts), 250 PINMUX_ITEM(i2c0_pins), 251 #ifdef CONFIG_NAND_DAVINCI 252 PINMUX_ITEM(emifa_pins_cs3), 253 PINMUX_ITEM(emifa_pins_cs4), 254 PINMUX_ITEM(emifa_pins_nand), 255 #elif defined(CONFIG_USE_NOR) 256 PINMUX_ITEM(emifa_pins_cs2), 257 PINMUX_ITEM(emifa_pins_nor), 258 #endif 259 PINMUX_ITEM(gpio_pins), 260 #ifdef CONFIG_MMC_DAVINCI 261 PINMUX_ITEM(mmc0_pins), 262 #endif 263 }; 264 265 const int pinmuxes_size = ARRAY_SIZE(pinmuxes); 266 267 const struct lpsc_resource lpsc[] = { 268 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ 269 { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ 270 { DAVINCI_LPSC_EMAC }, /* image download */ 271 { DAVINCI_LPSC_UART2 }, /* console */ 272 { DAVINCI_LPSC_GPIO }, 273 #ifdef CONFIG_MMC_DAVINCI 274 { DAVINCI_LPSC_MMC_SD }, 275 #endif 276 }; 277 278 const int lpsc_size = ARRAY_SIZE(lpsc); 279 280 #ifndef CONFIG_DA850_EVM_MAX_CPU_CLK 281 #define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000 282 #endif 283 284 #define REV_AM18X_EVM 0x100 285 286 /* 287 * get_board_rev() - setup to pass kernel board revision information 288 * Returns: 289 * bit[0-3] Maximum cpu clock rate supported by onboard SoC 290 * 0000b - 300 MHz 291 * 0001b - 372 MHz 292 * 0010b - 408 MHz 293 * 0011b - 456 MHz 294 */ 295 u32 get_board_rev(void) 296 { 297 char *s; 298 u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK; 299 u32 rev = 0; 300 301 s = env_get("maxcpuclk"); 302 if (s) 303 maxcpuclk = simple_strtoul(s, NULL, 10); 304 305 if (maxcpuclk >= 456000000) 306 rev = 3; 307 else if (maxcpuclk >= 408000000) 308 rev = 2; 309 else if (maxcpuclk >= 372000000) 310 rev = 1; 311 #ifdef CONFIG_DA850_AM18X_EVM 312 rev |= REV_AM18X_EVM; 313 #endif 314 return rev; 315 } 316 317 int board_early_init_f(void) 318 { 319 /* 320 * Power on required peripherals 321 * ARM does not have access by default to PSC0 and PSC1 322 * assuming here that the DSP bootloader has set the IOPU 323 * such that PSC access is available to ARM 324 */ 325 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) 326 return 1; 327 328 return 0; 329 } 330 331 int board_init(void) 332 { 333 irq_init(); 334 335 #ifdef CONFIG_NAND_DAVINCI 336 /* 337 * NAND CS setup - cycle counts based on da850evm NAND timings in the 338 * Linux kernel @ 25MHz EMIFA 339 */ 340 writel((DAVINCI_ABCR_WSETUP(2) | 341 DAVINCI_ABCR_WSTROBE(2) | 342 DAVINCI_ABCR_WHOLD(1) | 343 DAVINCI_ABCR_RSETUP(1) | 344 DAVINCI_ABCR_RSTROBE(4) | 345 DAVINCI_ABCR_RHOLD(0) | 346 DAVINCI_ABCR_TA(1) | 347 DAVINCI_ABCR_ASIZE_8BIT), 348 &davinci_emif_regs->ab2cr); /* CS3 */ 349 #endif 350 351 /* arch number of the board */ 352 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM; 353 354 /* address of boot parameters */ 355 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; 356 357 /* setup the SUSPSRC for ARM to control emulation suspend */ 358 writel(readl(&davinci_syscfg_regs->suspsrc) & 359 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | 360 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | 361 DAVINCI_SYSCFG_SUSPSRC_UART2), 362 &davinci_syscfg_regs->suspsrc); 363 364 /* configure pinmux settings */ 365 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) 366 return 1; 367 368 #ifdef CONFIG_USE_NOR 369 /* Set the GPIO direction as output */ 370 clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11)); 371 372 /* Set the output as low */ 373 writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR); 374 #endif 375 376 #ifdef CONFIG_MMC_DAVINCI 377 /* Set the GPIO direction as output */ 378 clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11)); 379 380 /* Set the output as high */ 381 writel(0x01 << 11, GPIO_BANK0_REG_SET_ADDR); 382 #endif 383 384 #ifdef CONFIG_DRIVER_TI_EMAC 385 davinci_emac_mii_mode_sel(HAS_RMII); 386 #endif /* CONFIG_DRIVER_TI_EMAC */ 387 388 /* enable the console UART */ 389 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | 390 DAVINCI_UART_PWREMU_MGMT_UTRST), 391 &davinci_uart2_ctrl_regs->pwremu_mgmt); 392 393 return 0; 394 } 395 396 #ifdef CONFIG_DRIVER_TI_EMAC 397 398 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII 399 /** 400 * rmii_hw_init 401 * 402 * DA850/OMAP-L138 EVM can interface to a daughter card for 403 * additional features. This card has an I2C GPIO Expander TCA6416 404 * to select the required functions like camera, RMII Ethernet, 405 * character LCD, video. 406 * 407 * Initialization of the expander involves configuring the 408 * polarity and direction of the ports. P07-P05 are used here. 409 * These ports are connected to a Mux chip which enables only one 410 * functionality at a time. 411 * 412 * For RMII phy to respond, the MII MDIO clock has to be disabled 413 * since both the PHY devices have address as zero. The MII MDIO 414 * clock is controlled via GPIO2[6]. 415 * 416 * This code is valid for Beta version of the hardware 417 */ 418 int rmii_hw_init(void) 419 { 420 const struct pinmux_config gpio_pins[] = { 421 { pinmux(6), 8, 1 } 422 }; 423 u_int8_t buf[2]; 424 unsigned int temp; 425 int ret; 426 427 /* PinMux for GPIO */ 428 if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0) 429 return 1; 430 431 /* I2C Exapnder configuration */ 432 /* Set polarity to non-inverted */ 433 buf[0] = 0x0; 434 buf[1] = 0x0; 435 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2); 436 if (ret) { 437 printf("\nExpander @ 0x%02x write FAILED!!!\n", 438 CONFIG_SYS_I2C_EXPANDER_ADDR); 439 return ret; 440 } 441 442 /* Configure P07-P05 as outputs */ 443 buf[0] = 0x1f; 444 buf[1] = 0xff; 445 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2); 446 if (ret) { 447 printf("\nExpander @ 0x%02x write FAILED!!!\n", 448 CONFIG_SYS_I2C_EXPANDER_ADDR); 449 } 450 451 /* For Ethernet RMII selection 452 * P07(SelA)=0 453 * P06(SelB)=1 454 * P05(SelC)=1 455 */ 456 if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) { 457 printf("\nExpander @ 0x%02x read FAILED!!!\n", 458 CONFIG_SYS_I2C_EXPANDER_ADDR); 459 } 460 461 buf[0] &= 0x1f; 462 buf[0] |= (0 << 7) | (1 << 6) | (1 << 5); 463 if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) { 464 printf("\nExpander @ 0x%02x write FAILED!!!\n", 465 CONFIG_SYS_I2C_EXPANDER_ADDR); 466 } 467 468 /* Set the output as high */ 469 temp = REG(GPIO_BANK2_REG_SET_ADDR); 470 temp |= (0x01 << 6); 471 REG(GPIO_BANK2_REG_SET_ADDR) = temp; 472 473 /* Set the GPIO direction as output */ 474 temp = REG(GPIO_BANK2_REG_DIR_ADDR); 475 temp &= ~(0x01 << 6); 476 REG(GPIO_BANK2_REG_DIR_ADDR) = temp; 477 478 return 0; 479 } 480 #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */ 481 482 /* 483 * Initializes on-board ethernet controllers. 484 */ 485 int board_eth_init(bd_t *bis) 486 { 487 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII 488 /* Select RMII fucntion through the expander */ 489 if (rmii_hw_init()) 490 printf("RMII hardware init failed!!!\n"); 491 #endif 492 if (!davinci_emac_initialize()) { 493 printf("Error: Ethernet init failed!\n"); 494 return -1; 495 } 496 497 return 0; 498 } 499 #endif /* CONFIG_DRIVER_TI_EMAC */ 500