1 /* 2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 3 * 4 * Based on da830evm.c. Original Copyrights follow: 5 * 6 * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com> 7 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #include <common.h> 13 #include <environment.h> 14 #include <i2c.h> 15 #include <net.h> 16 #include <netdev.h> 17 #include <spi.h> 18 #include <spi_flash.h> 19 #include <asm/arch/hardware.h> 20 #include <asm/ti-common/davinci_nand.h> 21 #include <asm/arch/emac_defs.h> 22 #include <asm/arch/pinmux_defs.h> 23 #include <asm/io.h> 24 #include <asm/arch/davinci_misc.h> 25 #include <linux/errno.h> 26 #include <hwconfig.h> 27 #include <asm/mach-types.h> 28 29 #ifdef CONFIG_MMC_DAVINCI 30 #include <mmc.h> 31 #include <asm/arch/sdmmc_defs.h> 32 #endif 33 34 DECLARE_GLOBAL_DATA_PTR; 35 36 #ifdef CONFIG_DRIVER_TI_EMAC 37 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII 38 #define HAS_RMII 1 39 #else 40 #define HAS_RMII 0 41 #endif 42 #endif /* CONFIG_DRIVER_TI_EMAC */ 43 44 #define CFG_MAC_ADDR_SPI_BUS 0 45 #define CFG_MAC_ADDR_SPI_CS 0 46 #define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 47 #define CFG_MAC_ADDR_SPI_MODE SPI_MODE_3 48 49 #define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K) 50 51 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH 52 static int get_mac_addr(u8 *addr) 53 { 54 struct spi_flash *flash; 55 int ret; 56 57 flash = spi_flash_probe(CFG_MAC_ADDR_SPI_BUS, CFG_MAC_ADDR_SPI_CS, 58 CFG_MAC_ADDR_SPI_MAX_HZ, CFG_MAC_ADDR_SPI_MODE); 59 if (!flash) { 60 printf("Error - unable to probe SPI flash.\n"); 61 return -1; 62 } 63 64 ret = spi_flash_read(flash, (CFG_MAC_ADDR_OFFSET) + 1, 7, addr); 65 if (ret) { 66 printf("Error - unable to read MAC address from SPI flash.\n"); 67 return -1; 68 } 69 70 return ret; 71 } 72 #endif 73 74 void dsp_lpsc_on(unsigned domain, unsigned int id) 75 { 76 dv_reg_p mdstat, mdctl, ptstat, ptcmd; 77 struct davinci_psc_regs *psc_regs; 78 79 psc_regs = davinci_psc0_regs; 80 mdstat = &psc_regs->psc0.mdstat[id]; 81 mdctl = &psc_regs->psc0.mdctl[id]; 82 ptstat = &psc_regs->ptstat; 83 ptcmd = &psc_regs->ptcmd; 84 85 while (*ptstat & (0x1 << domain)) 86 ; 87 88 if ((*mdstat & 0x1f) == 0x03) 89 return; /* Already on and enabled */ 90 91 *mdctl |= 0x03; 92 93 *ptcmd = 0x1 << domain; 94 95 while (*ptstat & (0x1 << domain)) 96 ; 97 while ((*mdstat & 0x1f) != 0x03) 98 ; /* Probably an overkill... */ 99 } 100 101 static void dspwake(void) 102 { 103 unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE; 104 u32 val; 105 106 /* if the device is ARM only, return */ 107 if ((readl(CHIP_REV_ID_REG) & 0x3f) == 0x10) 108 return; 109 110 if (hwconfig_subarg_cmp_f("dsp", "wake", "no", NULL)) 111 return; 112 113 *resetvect++ = 0x1E000; /* DSP Idle */ 114 /* clear out the next 10 words as NOP */ 115 memset(resetvect, 0, sizeof(unsigned) *10); 116 117 /* setup the DSP reset vector */ 118 writel(DAVINCI_L3CBARAM_BASE, HOST1CFG); 119 120 dsp_lpsc_on(1, DAVINCI_LPSC_GEM); 121 val = readl(PSC0_MDCTL + (15 * 4)); 122 val |= 0x100; 123 writel(val, (PSC0_MDCTL + (15 * 4))); 124 } 125 126 int misc_init_r(void) 127 { 128 dspwake(); 129 130 #if defined(CONFIG_MAC_ADDR_IN_SPIFLASH) || defined(CONFIG_MAC_ADDR_IN_EEPROM) 131 132 uchar env_enetaddr[6]; 133 int enetaddr_found; 134 135 enetaddr_found = eth_env_get_enetaddr("ethaddr", env_enetaddr); 136 137 #endif 138 139 #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH 140 int spi_mac_read; 141 uchar buff[6]; 142 143 spi_mac_read = get_mac_addr(buff); 144 buff[0] = 0; 145 146 /* 147 * MAC address not present in the environment 148 * try and read the MAC address from SPI flash 149 * and set it. 150 */ 151 if (!enetaddr_found) { 152 if (!spi_mac_read) { 153 if (is_valid_ethaddr(buff)) { 154 if (eth_env_set_enetaddr("ethaddr", buff)) { 155 printf("Warning: Failed to " 156 "set MAC address from SPI flash\n"); 157 } 158 } else { 159 printf("Warning: Invalid " 160 "MAC address read from SPI flash\n"); 161 } 162 } 163 } else { 164 /* 165 * MAC address present in environment compare it with 166 * the MAC address in SPI flash and warn on mismatch 167 */ 168 if (!spi_mac_read && is_valid_ethaddr(buff) && 169 memcmp(env_enetaddr, buff, 6)) 170 printf("Warning: MAC address in SPI flash don't match " 171 "with the MAC address in the environment\n"); 172 printf("Default using MAC address from environment\n"); 173 } 174 175 #elif defined(CONFIG_MAC_ADDR_IN_EEPROM) 176 uint8_t enetaddr[8]; 177 int eeprom_mac_read; 178 179 /* Read Ethernet MAC address from EEPROM */ 180 eeprom_mac_read = dvevm_read_mac_address(enetaddr); 181 182 /* 183 * MAC address not present in the environment 184 * try and read the MAC address from EEPROM flash 185 * and set it. 186 */ 187 if (!enetaddr_found) { 188 if (eeprom_mac_read) 189 /* Set Ethernet MAC address from EEPROM */ 190 davinci_sync_env_enetaddr(enetaddr); 191 } else { 192 /* 193 * MAC address present in environment compare it with 194 * the MAC address in EEPROM and warn on mismatch 195 */ 196 if (eeprom_mac_read && memcmp(enetaddr, env_enetaddr, 6)) 197 printf("Warning: MAC address in EEPROM don't match " 198 "with the MAC address in the environment\n"); 199 printf("Default using MAC address from environment\n"); 200 } 201 202 #endif 203 return 0; 204 } 205 206 #ifdef CONFIG_MMC_DAVINCI 207 static struct davinci_mmc mmc_sd0 = { 208 .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE, 209 .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */ 210 .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, 211 .version = MMC_CTLR_VERSION_2, 212 }; 213 214 int board_mmc_init(bd_t *bis) 215 { 216 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID); 217 218 /* Add slot-0 to mmc subsystem */ 219 return davinci_mmc_init(bis, &mmc_sd0); 220 } 221 #endif 222 223 static const struct pinmux_config gpio_pins[] = { 224 #ifdef CONFIG_USE_NOR 225 /* GP0[11] is required for NOR to work on Rev 3 EVMs */ 226 { pinmux(0), 8, 4 }, /* GP0[11] */ 227 #endif 228 #ifdef CONFIG_MMC_DAVINCI 229 /* GP0[11] is required for SD to work on Rev 3 EVMs */ 230 { pinmux(0), 8, 4 }, /* GP0[11] */ 231 #endif 232 }; 233 234 const struct pinmux_resource pinmuxes[] = { 235 #ifdef CONFIG_DRIVER_TI_EMAC 236 PINMUX_ITEM(emac_pins_mdio), 237 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII 238 PINMUX_ITEM(emac_pins_rmii), 239 #else 240 PINMUX_ITEM(emac_pins_mii), 241 #endif 242 #endif 243 #ifdef CONFIG_SPI_FLASH 244 PINMUX_ITEM(spi1_pins_base), 245 PINMUX_ITEM(spi1_pins_scs0), 246 #endif 247 PINMUX_ITEM(uart2_pins_txrx), 248 PINMUX_ITEM(uart2_pins_rtscts), 249 PINMUX_ITEM(i2c0_pins), 250 #ifdef CONFIG_NAND_DAVINCI 251 PINMUX_ITEM(emifa_pins_cs3), 252 PINMUX_ITEM(emifa_pins_cs4), 253 PINMUX_ITEM(emifa_pins_nand), 254 #elif defined(CONFIG_USE_NOR) 255 PINMUX_ITEM(emifa_pins_cs2), 256 PINMUX_ITEM(emifa_pins_nor), 257 #endif 258 PINMUX_ITEM(gpio_pins), 259 #ifdef CONFIG_MMC_DAVINCI 260 PINMUX_ITEM(mmc0_pins), 261 #endif 262 }; 263 264 const int pinmuxes_size = ARRAY_SIZE(pinmuxes); 265 266 const struct lpsc_resource lpsc[] = { 267 { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ 268 { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ 269 { DAVINCI_LPSC_EMAC }, /* image download */ 270 { DAVINCI_LPSC_UART2 }, /* console */ 271 { DAVINCI_LPSC_GPIO }, 272 #ifdef CONFIG_MMC_DAVINCI 273 { DAVINCI_LPSC_MMC_SD }, 274 #endif 275 }; 276 277 const int lpsc_size = ARRAY_SIZE(lpsc); 278 279 #ifndef CONFIG_DA850_EVM_MAX_CPU_CLK 280 #define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000 281 #endif 282 283 #define REV_AM18X_EVM 0x100 284 285 /* 286 * get_board_rev() - setup to pass kernel board revision information 287 * Returns: 288 * bit[0-3] Maximum cpu clock rate supported by onboard SoC 289 * 0000b - 300 MHz 290 * 0001b - 372 MHz 291 * 0010b - 408 MHz 292 * 0011b - 456 MHz 293 */ 294 u32 get_board_rev(void) 295 { 296 char *s; 297 u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK; 298 u32 rev = 0; 299 300 s = env_get("maxcpuclk"); 301 if (s) 302 maxcpuclk = simple_strtoul(s, NULL, 10); 303 304 if (maxcpuclk >= 456000000) 305 rev = 3; 306 else if (maxcpuclk >= 408000000) 307 rev = 2; 308 else if (maxcpuclk >= 372000000) 309 rev = 1; 310 #ifdef CONFIG_DA850_AM18X_EVM 311 rev |= REV_AM18X_EVM; 312 #endif 313 return rev; 314 } 315 316 int board_early_init_f(void) 317 { 318 /* 319 * Power on required peripherals 320 * ARM does not have access by default to PSC0 and PSC1 321 * assuming here that the DSP bootloader has set the IOPU 322 * such that PSC access is available to ARM 323 */ 324 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) 325 return 1; 326 327 return 0; 328 } 329 330 int board_init(void) 331 { 332 irq_init(); 333 334 #ifdef CONFIG_NAND_DAVINCI 335 /* 336 * NAND CS setup - cycle counts based on da850evm NAND timings in the 337 * Linux kernel @ 25MHz EMIFA 338 */ 339 writel((DAVINCI_ABCR_WSETUP(2) | 340 DAVINCI_ABCR_WSTROBE(2) | 341 DAVINCI_ABCR_WHOLD(1) | 342 DAVINCI_ABCR_RSETUP(1) | 343 DAVINCI_ABCR_RSTROBE(4) | 344 DAVINCI_ABCR_RHOLD(0) | 345 DAVINCI_ABCR_TA(1) | 346 DAVINCI_ABCR_ASIZE_8BIT), 347 &davinci_emif_regs->ab2cr); /* CS3 */ 348 #endif 349 350 /* arch number of the board */ 351 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM; 352 353 /* address of boot parameters */ 354 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; 355 356 /* setup the SUSPSRC for ARM to control emulation suspend */ 357 writel(readl(&davinci_syscfg_regs->suspsrc) & 358 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | 359 DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | 360 DAVINCI_SYSCFG_SUSPSRC_UART2), 361 &davinci_syscfg_regs->suspsrc); 362 363 /* configure pinmux settings */ 364 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) 365 return 1; 366 367 #ifdef CONFIG_USE_NOR 368 /* Set the GPIO direction as output */ 369 clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11)); 370 371 /* Set the output as low */ 372 writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR); 373 #endif 374 375 #ifdef CONFIG_MMC_DAVINCI 376 /* Set the GPIO direction as output */ 377 clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11)); 378 379 /* Set the output as high */ 380 writel(0x01 << 11, GPIO_BANK0_REG_SET_ADDR); 381 #endif 382 383 #ifdef CONFIG_DRIVER_TI_EMAC 384 davinci_emac_mii_mode_sel(HAS_RMII); 385 #endif /* CONFIG_DRIVER_TI_EMAC */ 386 387 /* enable the console UART */ 388 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | 389 DAVINCI_UART_PWREMU_MGMT_UTRST), 390 &davinci_uart2_ctrl_regs->pwremu_mgmt); 391 392 return 0; 393 } 394 395 #ifdef CONFIG_DRIVER_TI_EMAC 396 397 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII 398 /** 399 * rmii_hw_init 400 * 401 * DA850/OMAP-L138 EVM can interface to a daughter card for 402 * additional features. This card has an I2C GPIO Expander TCA6416 403 * to select the required functions like camera, RMII Ethernet, 404 * character LCD, video. 405 * 406 * Initialization of the expander involves configuring the 407 * polarity and direction of the ports. P07-P05 are used here. 408 * These ports are connected to a Mux chip which enables only one 409 * functionality at a time. 410 * 411 * For RMII phy to respond, the MII MDIO clock has to be disabled 412 * since both the PHY devices have address as zero. The MII MDIO 413 * clock is controlled via GPIO2[6]. 414 * 415 * This code is valid for Beta version of the hardware 416 */ 417 int rmii_hw_init(void) 418 { 419 const struct pinmux_config gpio_pins[] = { 420 { pinmux(6), 8, 1 } 421 }; 422 u_int8_t buf[2]; 423 unsigned int temp; 424 int ret; 425 426 /* PinMux for GPIO */ 427 if (davinci_configure_pin_mux(gpio_pins, ARRAY_SIZE(gpio_pins)) != 0) 428 return 1; 429 430 /* I2C Exapnder configuration */ 431 /* Set polarity to non-inverted */ 432 buf[0] = 0x0; 433 buf[1] = 0x0; 434 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 4, 1, buf, 2); 435 if (ret) { 436 printf("\nExpander @ 0x%02x write FAILED!!!\n", 437 CONFIG_SYS_I2C_EXPANDER_ADDR); 438 return ret; 439 } 440 441 /* Configure P07-P05 as outputs */ 442 buf[0] = 0x1f; 443 buf[1] = 0xff; 444 ret = i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 6, 1, buf, 2); 445 if (ret) { 446 printf("\nExpander @ 0x%02x write FAILED!!!\n", 447 CONFIG_SYS_I2C_EXPANDER_ADDR); 448 } 449 450 /* For Ethernet RMII selection 451 * P07(SelA)=0 452 * P06(SelB)=1 453 * P05(SelC)=1 454 */ 455 if (i2c_read(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) { 456 printf("\nExpander @ 0x%02x read FAILED!!!\n", 457 CONFIG_SYS_I2C_EXPANDER_ADDR); 458 } 459 460 buf[0] &= 0x1f; 461 buf[0] |= (0 << 7) | (1 << 6) | (1 << 5); 462 if (i2c_write(CONFIG_SYS_I2C_EXPANDER_ADDR, 2, 1, buf, 1)) { 463 printf("\nExpander @ 0x%02x write FAILED!!!\n", 464 CONFIG_SYS_I2C_EXPANDER_ADDR); 465 } 466 467 /* Set the output as high */ 468 temp = REG(GPIO_BANK2_REG_SET_ADDR); 469 temp |= (0x01 << 6); 470 REG(GPIO_BANK2_REG_SET_ADDR) = temp; 471 472 /* Set the GPIO direction as output */ 473 temp = REG(GPIO_BANK2_REG_DIR_ADDR); 474 temp &= ~(0x01 << 6); 475 REG(GPIO_BANK2_REG_DIR_ADDR) = temp; 476 477 return 0; 478 } 479 #endif /* CONFIG_DRIVER_TI_EMAC_USE_RMII */ 480 481 /* 482 * Initializes on-board ethernet controllers. 483 */ 484 int board_eth_init(bd_t *bis) 485 { 486 #ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII 487 /* Select RMII fucntion through the expander */ 488 if (rmii_hw_init()) 489 printf("RMII hardware init failed!!!\n"); 490 #endif 491 if (!davinci_emac_initialize()) { 492 printf("Error: Ethernet init failed!\n"); 493 return -1; 494 } 495 496 return 0; 497 } 498 #endif /* CONFIG_DRIVER_TI_EMAC */ 499