153193a4fSChristophe Leroy /* 253193a4fSChristophe Leroy * Copyright (C) 2010-2017 CS Systemes d'Information 353193a4fSChristophe Leroy * Florent Trinh Thai <florent.trinh-thai@c-s.fr> 453193a4fSChristophe Leroy * Christophe Leroy <christophe.leroy@c-s.fr> 553193a4fSChristophe Leroy * 653193a4fSChristophe Leroy * SPDX-License-Identifier: GPL-2.0+ 753193a4fSChristophe Leroy */ 853193a4fSChristophe Leroy 953193a4fSChristophe Leroy #include <config.h> 1053193a4fSChristophe Leroy #include <common.h> 1153193a4fSChristophe Leroy #include <nand.h> 1253193a4fSChristophe Leroy #include <asm/io.h> 1353193a4fSChristophe Leroy 1453193a4fSChristophe Leroy #define BIT_CLE ((unsigned short)0x0800) 1553193a4fSChristophe Leroy #define BIT_ALE ((unsigned short)0x0400) 1653193a4fSChristophe Leroy #define BIT_NCE ((unsigned short)0x1000) 1753193a4fSChristophe Leroy 1853193a4fSChristophe Leroy static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl) 1953193a4fSChristophe Leroy { 20*3949d2a7SChristophe Leroy struct nand_chip *this = mtd_to_nand(mtdinfo); 2153193a4fSChristophe Leroy immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR; 2253193a4fSChristophe Leroy unsigned short pddat = 0; 2353193a4fSChristophe Leroy 2453193a4fSChristophe Leroy /* The hardware control change */ 2553193a4fSChristophe Leroy if (ctrl & NAND_CTRL_CHANGE) { 2653193a4fSChristophe Leroy pddat = in_be16(&immr->im_ioport.iop_pddat); 2753193a4fSChristophe Leroy 2853193a4fSChristophe Leroy /* Clearing ALE and CLE */ 2953193a4fSChristophe Leroy pddat &= ~(BIT_CLE | BIT_ALE); 3053193a4fSChristophe Leroy 3153193a4fSChristophe Leroy /* Driving NCE pin */ 3253193a4fSChristophe Leroy if (ctrl & NAND_NCE) 3353193a4fSChristophe Leroy pddat &= ~BIT_NCE; 3453193a4fSChristophe Leroy else 3553193a4fSChristophe Leroy pddat |= BIT_NCE; 3653193a4fSChristophe Leroy 3753193a4fSChristophe Leroy /* Driving CLE and ALE pin */ 3853193a4fSChristophe Leroy if (ctrl & NAND_CLE) 3953193a4fSChristophe Leroy pddat |= BIT_CLE; 4053193a4fSChristophe Leroy if (ctrl & NAND_ALE) 4153193a4fSChristophe Leroy pddat |= BIT_ALE; 4253193a4fSChristophe Leroy 4353193a4fSChristophe Leroy out_be16(&immr->im_ioport.iop_pddat, pddat); 4453193a4fSChristophe Leroy } 4553193a4fSChristophe Leroy 4653193a4fSChristophe Leroy /* Writing the command */ 4753193a4fSChristophe Leroy if (cmd != NAND_CMD_NONE) 4853193a4fSChristophe Leroy out_8(this->IO_ADDR_W, cmd); 4953193a4fSChristophe Leroy } 5053193a4fSChristophe Leroy 5153193a4fSChristophe Leroy int board_nand_init(struct nand_chip *nand) 5253193a4fSChristophe Leroy { 5353193a4fSChristophe Leroy immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR; 5453193a4fSChristophe Leroy 5553193a4fSChristophe Leroy /* Set GPIO Port */ 5653193a4fSChristophe Leroy setbits_be16(&immr->im_ioport.iop_pddir, 0x1c00); 5753193a4fSChristophe Leroy clrbits_be16(&immr->im_ioport.iop_pdpar, 0x1c00); 5853193a4fSChristophe Leroy clrsetbits_be16(&immr->im_ioport.iop_pddat, 0x0c00, 0x1000); 5953193a4fSChristophe Leroy 6053193a4fSChristophe Leroy nand->chip_delay = 60; 6153193a4fSChristophe Leroy nand->ecc.mode = NAND_ECC_SOFT; 6253193a4fSChristophe Leroy nand->cmd_ctrl = nand_hwcontrol; 6353193a4fSChristophe Leroy 6453193a4fSChristophe Leroy return 0; 6553193a4fSChristophe Leroy } 66