1 /* 2 * (C) Copyright 2012 3 * Corscience GmbH & Co. KG, <www.corscience.de> 4 * Thomas Weber <weber@corscience.de> 5 * Sunil Kumar <sunilsaini05@gmail.com> 6 * Shashi Ranjan <shashiranjanmca05@gmail.com> 7 * 8 * Derived from Devkit8000 code by 9 * Frederik Kriewitz <frederik@kriewitz.eu> 10 * 11 * SPDX-License-Identifier: GPL-2.0+ 12 */ 13 #include <common.h> 14 #include <twl4030.h> 15 #include <asm/io.h> 16 #include <asm/gpio.h> 17 #include <asm/arch/mmc_host_def.h> 18 #include <asm/arch/mux.h> 19 #include <asm/arch/sys_proto.h> 20 #include <asm/arch/mem.h> 21 #include "tricorder.h" 22 #include "tricorder-eeprom.h" 23 24 DECLARE_GLOBAL_DATA_PTR; 25 26 /* 27 * Routine: board_init 28 * Description: Early hardware init. 29 */ 30 int board_init(void) 31 { 32 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ 33 /* boot param addr */ 34 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); 35 36 return 0; 37 } 38 39 /** 40 * get_eeprom - read the eeprom 41 * 42 * @eeprom - pointer to a eeprom struct to fill 43 * 44 * This function will panic() on wrong EEPROM content 45 */ 46 static void get_eeprom(struct tricorder_eeprom *eeprom) 47 { 48 int ret; 49 50 if (!eeprom) 51 panic("No eeprom given!\n"); 52 53 ret = gpio_request(7, "BMS"); 54 if (ret) 55 panic("gpio: requesting BMS pin failed\n"); 56 57 ret = gpio_direction_input(7); 58 if (ret) 59 panic("gpio: set BMS as input failed\n"); 60 61 ret = gpio_get_value(7); 62 if (ret < 0) 63 panic("gpio: get BMS pin state failed\n"); 64 65 gpio_free(7); 66 67 if (ret == 0) { 68 /* BMS is _not_ set, do the EEPROM check */ 69 ret = tricorder_get_eeprom(0x51, eeprom); 70 if (!ret) { 71 if (strncmp(eeprom->board_name, "CS10411", 7) != 0) 72 panic("Wrong board name '%.*s'\n", 73 sizeof(eeprom->board_name), 74 eeprom->board_name); 75 if (eeprom->board_version[0] < 'D') 76 panic("Wrong board version '%.*s'\n", 77 sizeof(eeprom->board_version), 78 eeprom->board_version); 79 } else { 80 panic("Could not get board revision\n"); 81 } 82 } 83 } 84 85 /** 86 * print_hwversion - print out a HW version string 87 * 88 * @eeprom - pointer to the eeprom 89 */ 90 static void print_hwversion(struct tricorder_eeprom *eeprom) 91 { 92 size_t len; 93 if (!eeprom) 94 panic("No eeprom given!"); 95 96 printf("Board %.*s:%.*s serial %.*s", 97 sizeof(eeprom->board_name), eeprom->board_name, 98 sizeof(eeprom->board_version), eeprom->board_version, 99 sizeof(eeprom->board_serial), eeprom->board_serial); 100 101 len = strnlen(eeprom->interface_version, 102 sizeof(eeprom->interface_version)); 103 if (len > 0) 104 printf(" HW interface version %.*s", 105 sizeof(eeprom->interface_version), 106 eeprom->interface_version); 107 puts("\n"); 108 } 109 110 /* 111 * Routine: misc_init_r 112 * Description: Configure board specific parts 113 */ 114 int misc_init_r(void) 115 { 116 struct tricorder_eeprom eeprom; 117 get_eeprom(&eeprom); 118 print_hwversion(&eeprom); 119 120 twl4030_power_init(); 121 status_led_set(0, STATUS_LED_ON); 122 status_led_set(1, STATUS_LED_ON); 123 status_led_set(2, STATUS_LED_ON); 124 125 dieid_num_r(); 126 127 return 0; 128 } 129 130 /* 131 * Routine: set_muxconf_regs 132 * Description: Setting up the configuration Mux registers specific to the 133 * hardware. Many pins need to be moved from protect to primary 134 * mode. 135 */ 136 void set_muxconf_regs(void) 137 { 138 MUX_TRICORDER(); 139 } 140 141 #if defined(CONFIG_GENERIC_MMC) && !(defined(CONFIG_SPL_BUILD)) 142 int board_mmc_init(bd_t *bis) 143 { 144 return omap_mmc_init(0, 0, 0, -1, -1); 145 } 146 #endif 147 148 /* 149 * Routine: get_board_mem_timings 150 * Description: If we use SPL then there is no x-loader nor config header 151 * so we have to setup the DDR timings ourself on the first bank. This 152 * provides the timing values back to the function that configures 153 * the memory. We have either one or two banks of 128MB DDR. 154 */ 155 void get_board_mem_timings(struct board_sdrc_timings *timings) 156 { 157 struct tricorder_eeprom eeprom; 158 get_eeprom(&eeprom); 159 160 /* General SDRC config */ 161 if (eeprom.board_version[0] > 'D') { 162 /* use optimized timings for our SDRAM device */ 163 timings->mcfg = MCFG((256 << 20), 14); 164 #define MT46H64M32_TDAL 6 /* Twr/Tck + Trp/tck */ 165 /* 15/6 + 18/6 = 5.5 -> 6 */ 166 #define MT46H64M32_TDPL 3 /* 15/6 = 2.5 -> 3 (Twr) */ 167 #define MT46H64M32_TRRD 2 /* 12/6 = 2 */ 168 #define MT46H64M32_TRCD 3 /* 18/6 = 3 */ 169 #define MT46H64M32_TRP 3 /* 18/6 = 3 */ 170 #define MT46H64M32_TRAS 7 /* 42/6 = 7 */ 171 #define MT46H64M32_TRC 10 /* 60/6 = 10 */ 172 #define MT46H64M32_TRFC 12 /* 72/6 = 12 */ 173 timings->ctrla = ACTIM_CTRLA(MT46H64M32_TRFC, MT46H64M32_TRC, 174 MT46H64M32_TRAS, MT46H64M32_TRP, 175 MT46H64M32_TRCD, MT46H64M32_TRRD, 176 MT46H64M32_TDPL, 177 MT46H64M32_TDAL); 178 179 #define MT46H64M32_TWTR 1 180 #define MT46H64M32_TCKE 1 181 #define MT46H64M32_XSR 19 /* 112.5/6 = 18.75 => ~19 */ 182 #define MT46H64M32_TXP 1 183 timings->ctrlb = ACTIM_CTRLB(MT46H64M32_TWTR, MT46H64M32_TCKE, 184 MT46H64M32_TXP, MT46H64M32_XSR); 185 186 timings->mr = MICRON_V_MR_165; 187 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 188 } else { 189 /* use conservative beagleboard timings as default */ 190 timings->mcfg = MICRON_V_MCFG_165(128 << 20); 191 timings->ctrla = MICRON_V_ACTIMA_165; 192 timings->ctrlb = MICRON_V_ACTIMB_165; 193 timings->mr = MICRON_V_MR_165; 194 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; 195 } 196 } 197