1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * SPL specific code for Compulab CM-T54 board 4 * 5 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ 6 * 7 * Author: Dmitry Lifshitz <lifshitz@compulab.co.il> 8 */ 9 10 #include <asm/emif.h> 11 12 const struct emif_regs emif_regs_ddr3_532_mhz_cm_t54 = { 13 #if defined(CONFIG_DRAM_1G) || defined(CONFIG_DRAM_512M) 14 .sdram_config_init = 0x618522B2, 15 .sdram_config = 0x618522B2, 16 #elif defined(CONFIG_DRAM_2G) 17 .sdram_config_init = 0x618522BA, 18 .sdram_config = 0x618522BA, 19 #endif 20 .sdram_config2 = 0x0, 21 .ref_ctrl = 0x00001040, 22 .sdram_tim1 = 0xEEEF36F3, 23 .sdram_tim2 = 0x348F7FDA, 24 .sdram_tim3 = 0x027F88A8, 25 .read_idle_ctrl = 0x00050000, 26 .zq_config = 0x1007190B, 27 .temp_alert_config = 0x00000000, 28 29 .emif_ddr_phy_ctlr_1_init = 0x0030400B, 30 .emif_ddr_phy_ctlr_1 = 0x0034400B, 31 .emif_ddr_ext_phy_ctrl_1 = 0x04040100, 32 .emif_ddr_ext_phy_ctrl_2 = 0x00000000, 33 .emif_ddr_ext_phy_ctrl_3 = 0x00000000, 34 .emif_ddr_ext_phy_ctrl_4 = 0x00000000, 35 .emif_ddr_ext_phy_ctrl_5 = 0x4350D435, 36 .emif_rd_wr_lvl_rmp_win = 0x00000000, 37 .emif_rd_wr_lvl_rmp_ctl = 0x80000000, 38 .emif_rd_wr_lvl_ctl = 0x00000000, 39 .emif_rd_wr_exec_thresh = 0x40000305, 40 }; 41 42 const struct dmm_lisa_map_regs lisa_map_cm_t54 = { 43 .dmm_lisa_map_0 = 0x0, 44 .dmm_lisa_map_1 = 0x0, 45 46 #ifdef CONFIG_DRAM_2G 47 .dmm_lisa_map_2 = 0x80740300, 48 #elif defined(CONFIG_DRAM_1G) 49 .dmm_lisa_map_2 = 0x80640300, 50 #elif defined(CONFIG_DRAM_512M) 51 .dmm_lisa_map_2 = 0x80500100, 52 #endif 53 .dmm_lisa_map_3 = 0x00000000, 54 .is_ma_present = 0x1, 55 }; 56 57 void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs) 58 { 59 *regs = &emif_regs_ddr3_532_mhz_cm_t54; 60 } 61 62 void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs) 63 { 64 *dmm_lisa_regs = &lisa_map_cm_t54; 65 } 66