1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2b09bf723SIgor Grinberg /*
3b09bf723SIgor Grinberg * (C) Copyright 2014 CompuLab, Ltd. <www.compulab.co.il>
4b09bf723SIgor Grinberg *
5b09bf723SIgor Grinberg * Authors: Igor Grinberg <grinberg@compulab.co.il>
6b09bf723SIgor Grinberg */
7b09bf723SIgor Grinberg
8b09bf723SIgor Grinberg #include <common.h>
9b09bf723SIgor Grinberg #include <asm/arch/sys_proto.h>
10b09bf723SIgor Grinberg #include <asm/arch/mux.h>
11b09bf723SIgor Grinberg #include <asm/io.h>
12b09bf723SIgor Grinberg
set_muxconf_regs(void)13b09bf723SIgor Grinberg void set_muxconf_regs(void)
14b09bf723SIgor Grinberg {
15b09bf723SIgor Grinberg /* SDRC */
16b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0));
17b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0));
18b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0));
19b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0));
20b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0));
21b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0));
22b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0));
23b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0));
24b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0));
25b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0));
26b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0));
27b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0));
28b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0));
29b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0));
30b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0));
31b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0));
32b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0));
33b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0));
34b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0));
35b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0));
36b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0));
37b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0));
38b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0));
39b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0));
40b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0));
41b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0));
42b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0));
43b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0));
44b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0));
45b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0));
46b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0));
47b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0));
48b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0));
49b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0));
50b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0));
51b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0));
52b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0));
53b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0));
54b09bf723SIgor Grinberg MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7));
55b09bf723SIgor Grinberg
56b09bf723SIgor Grinberg /* GPMC */
57b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0));
58b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0));
59b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0));
60b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0));
61b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0));
62b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0));
63b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0));
64b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0));
65b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0));
66b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0));
67b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0));
68b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0));
69b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0));
70b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0));
71b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0));
72b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0));
73b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0));
74b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0));
75b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0));
76b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0));
77b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0));
78b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0));
79b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0));
80b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0));
81b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0));
82b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0));
83b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0));
84b09bf723SIgor Grinberg
85a8a78c74SIgor Grinberg /* SB-T35 Ethernet */
86a8a78c74SIgor Grinberg MUX_VAL(CP(GPMC_NCS4), (IEN | PTU | EN | M0));
8740bbd52aSIgor Grinberg /* DVI enable */
8840bbd52aSIgor Grinberg MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | DIS | M4));/*GPIO_54*/
8940bbd52aSIgor Grinberg /* DataImage backlight */
9040bbd52aSIgor Grinberg MUX_VAL(CP(GPMC_NCS7), (IDIS | PTU | DIS | M4));/*GPIO_58*/
91a8a78c74SIgor Grinberg
92b09bf723SIgor Grinberg /* SB-T35 SD/MMC WP GPIO59 */
93b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_CLK), (IEN | PTU | EN | M4)); /*GPIO_59*/
94b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0));
95b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0));
96b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0));
97b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0));
98b09bf723SIgor Grinberg /* SB-T35 Audio Enable GPIO61 */
99b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_NBE1), (IDIS | PTU | EN | M4)); /*GPIO_61*/
100b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0));
101b09bf723SIgor Grinberg MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0));
102a8a78c74SIgor Grinberg /* SB-T35 Ethernet IRQ GPIO65 */
103a8a78c74SIgor Grinberg MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M4)); /*GPIO_65*/
104b09bf723SIgor Grinberg
105b09bf723SIgor Grinberg /* UART3 Console */
106b09bf723SIgor Grinberg MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0));
107b09bf723SIgor Grinberg MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0));
108b09bf723SIgor Grinberg /* RTC V3020 nCS GPIO163 */
109b09bf723SIgor Grinberg MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTU | EN | M4)); /*GPIO_163*/
110a8a78c74SIgor Grinberg /* SB-T35 Ethernet nRESET GPIO164 */
111a8a78c74SIgor Grinberg MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTU | EN | M4)); /*GPIO_164*/
112b09bf723SIgor Grinberg
113b09bf723SIgor Grinberg /* SB-T35 SD/MMC CD GPIO144 */
114b09bf723SIgor Grinberg MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M4)); /*GPIO_144*/
115b09bf723SIgor Grinberg /* WIFI nRESET GPIO145 */
116b09bf723SIgor Grinberg MUX_VAL(CP(UART2_RTS), (IEN | PTD | EN | M4)); /*GPIO_145*/
117011f5c13SIgor Grinberg /* USB1 PHY Reset GPIO 146 */
118011f5c13SIgor Grinberg MUX_VAL(CP(UART2_TX), (IEN | PTD | EN | M4)); /*GPIO_146*/
119011f5c13SIgor Grinberg /* USB2 PHY Reset GPIO 147 */
120011f5c13SIgor Grinberg MUX_VAL(CP(UART2_RX), (IEN | PTD | EN | M4)); /*GPIO_147*/
121b09bf723SIgor Grinberg
122b09bf723SIgor Grinberg /* MMC1 */
12363bb7593SDmitry Lifshitz MUX_VAL(CP(MMC1_CLK), (IEN | PTU | EN | M0));
12463bb7593SDmitry Lifshitz MUX_VAL(CP(MMC1_CMD), (IEN | PTU | DIS | M0));
12563bb7593SDmitry Lifshitz MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | DIS | M0));
12663bb7593SDmitry Lifshitz MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | DIS | M0));
12763bb7593SDmitry Lifshitz MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | DIS | M0));
12863bb7593SDmitry Lifshitz MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | DIS | M0));
129b09bf723SIgor Grinberg
13040bbd52aSIgor Grinberg /* DSS */
13140bbd52aSIgor Grinberg MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0));
13240bbd52aSIgor Grinberg MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0));
13340bbd52aSIgor Grinberg MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0));
13440bbd52aSIgor Grinberg MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0));
13540bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0));
13640bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0));
13740bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0));
13840bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0));
13940bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0));
14040bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0));
14140bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0));
14240bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0));
14340bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0));
14440bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0));
14540bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0));
14640bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0));
14740bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0));
14840bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0));
14940bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0));
15040bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0));
15140bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0));
15240bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0));
15340bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0));
15440bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0));
15540bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0));
15640bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0));
15740bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0));
15840bbd52aSIgor Grinberg MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0));
15940bbd52aSIgor Grinberg
160b09bf723SIgor Grinberg /* I2C */
161b09bf723SIgor Grinberg MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0));
162b09bf723SIgor Grinberg MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0));
163b09bf723SIgor Grinberg MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0));
164b09bf723SIgor Grinberg MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0));
165b09bf723SIgor Grinberg
166011f5c13SIgor Grinberg /* SB-T35 USB HUB Reset GPIO98 */
167011f5c13SIgor Grinberg MUX_VAL(CP(CCDC_WEN), (IDIS | PTU | EN | M4)); /*GPIO_98*/
168011f5c13SIgor Grinberg /* CM-T3517 USB HUB Reset GPIO152 */
169011f5c13SIgor Grinberg MUX_VAL(CP(MCBSP4_CLKX), (IDIS | PTD | DIS | M4)); /*GPIO_152*/
170011f5c13SIgor Grinberg
171a8a78c74SIgor Grinberg /* RMII */
172a8a78c74SIgor Grinberg MUX_VAL(CP(RMII_MDIO_DATA), (IEN | PTU | EN | M0));
173a8a78c74SIgor Grinberg MUX_VAL(CP(RMII_MDIO_CLK), (M0));
174a8a78c74SIgor Grinberg MUX_VAL(CP(RMII_RXD0), (IEN | PTD | DIS | M0));
175a8a78c74SIgor Grinberg MUX_VAL(CP(RMII_RXD1), (IEN | PTD | DIS | M0));
176a8a78c74SIgor Grinberg MUX_VAL(CP(RMII_CRS_DV), (IEN | PTD | DIS | M0));
177a8a78c74SIgor Grinberg MUX_VAL(CP(RMII_RXER), (IEN | PTD | DIS | M0));
178a8a78c74SIgor Grinberg MUX_VAL(CP(RMII_TXD0), (IDIS | M0));
179a8a78c74SIgor Grinberg MUX_VAL(CP(RMII_TXD1), (IDIS | M0));
180a8a78c74SIgor Grinberg MUX_VAL(CP(RMII_TXEN), (IDIS | M0));
181a8a78c74SIgor Grinberg MUX_VAL(CP(RMII_50MHZ_CLK), (IEN | PTU | DIS | M0));
182a8a78c74SIgor Grinberg
183b09bf723SIgor Grinberg /* Green LED GPIO186 */
184b09bf723SIgor Grinberg MUX_VAL(CP(SYS_CLKOUT2), (IDIS | PTU | DIS | M4)); /*GPIO_186*/
185b09bf723SIgor Grinberg
18640bbd52aSIgor Grinberg /* SPI */
18740bbd52aSIgor Grinberg MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M1)); /*MCSPI4_CLK*/
18840bbd52aSIgor Grinberg MUX_VAL(CP(MCBSP1_DX), (IEN | PTD | DIS | M1)); /*MCSPI4_SIMO*/
18940bbd52aSIgor Grinberg MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M1)); /*MCSPI4_SOMI*/
19040bbd52aSIgor Grinberg MUX_VAL(CP(MCBSP1_FSX), (IEN | PTU | EN | M1)); /*MCSPI4_CS0*/
19140bbd52aSIgor Grinberg /* LCD reset GPIO157 */
19240bbd52aSIgor Grinberg MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | DIS | M4)); /*GPIO_157*/
19340bbd52aSIgor Grinberg
194b09bf723SIgor Grinberg /* RTC V3020 CS Enable GPIO160 */
195b09bf723SIgor Grinberg MUX_VAL(CP(MCBSP_CLKS), (IEN | PTD | EN | M4)); /*GPIO_160*/
19640bbd52aSIgor Grinberg /* SB-T35 LVDS Transmitter SHDN GPIO162 */
19740bbd52aSIgor Grinberg MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTU | DIS | M4)); /*GPIO_162*/
198b09bf723SIgor Grinberg
199011f5c13SIgor Grinberg /* USB0 - mUSB */
200011f5c13SIgor Grinberg MUX_VAL(CP(USB0_DRVBUS), (IEN | PTD | EN | M0));
201011f5c13SIgor Grinberg /* USB1 EHCI */
202011f5c13SIgor Grinberg MUX_VAL(CP(ETK_D0_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT0*/
203011f5c13SIgor Grinberg MUX_VAL(CP(ETK_D1_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT1*/
204011f5c13SIgor Grinberg MUX_VAL(CP(ETK_D2_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT2*/
205011f5c13SIgor Grinberg MUX_VAL(CP(ETK_D7_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT3*/
206011f5c13SIgor Grinberg MUX_VAL(CP(ETK_D4_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT4*/
207011f5c13SIgor Grinberg MUX_VAL(CP(ETK_D5_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT5*/
208011f5c13SIgor Grinberg MUX_VAL(CP(ETK_D6_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT6*/
209011f5c13SIgor Grinberg MUX_VAL(CP(ETK_D3_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DT7*/
210011f5c13SIgor Grinberg MUX_VAL(CP(ETK_D8_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_DIR*/
211011f5c13SIgor Grinberg MUX_VAL(CP(ETK_D9_ES2), (IEN | PTD | EN | M3)); /*HSUSB1_NXT*/
212011f5c13SIgor Grinberg MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTD | DIS | M3)); /*HSUSB1_CLK*/
213011f5c13SIgor Grinberg MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | DIS | M3)); /*HSUSB1_STP*/
214011f5c13SIgor Grinberg /* USB2 EHCI */
215011f5c13SIgor Grinberg MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | EN | M3)); /*HSUSB2_DT0*/
216011f5c13SIgor Grinberg MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | EN | M3)); /*HSUSB2_DT1*/
217011f5c13SIgor Grinberg MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M3)); /*HSUSB2_DT2*/
218011f5c13SIgor Grinberg MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M3)); /*HSUSB2_DT3*/
219011f5c13SIgor Grinberg MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | EN | M3)); /*HSUSB2_DT4*/
220011f5c13SIgor Grinberg MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | EN | M3)); /*HSUSB2_DT5*/
221011f5c13SIgor Grinberg MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M3)); /*HSUSB2_DT6*/
222011f5c13SIgor Grinberg MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | EN | M3)); /*HSUSB2_DT7*/
223011f5c13SIgor Grinberg MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | EN | M3)); /*HSUSB2_DIR*/
224011f5c13SIgor Grinberg MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | EN | M3)); /*HSUSB2_NXT*/
225011f5c13SIgor Grinberg MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTD | DIS | M3)); /*HSUSB2_CLK*/
226011f5c13SIgor Grinberg MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTU | DIS | M3)); /*HSUSB2_STP*/
227011f5c13SIgor Grinberg
228b09bf723SIgor Grinberg /* SYS_BOOT */
229b09bf723SIgor Grinberg MUX_VAL(CP(SYS_BOOT0), (IEN | PTU | DIS | M4)); /*GPIO_2*/
230b09bf723SIgor Grinberg MUX_VAL(CP(SYS_BOOT1), (IEN | PTU | DIS | M4)); /*GPIO_3*/
231b09bf723SIgor Grinberg MUX_VAL(CP(SYS_BOOT2), (IEN | PTU | DIS | M4)); /*GPIO_4*/
232b09bf723SIgor Grinberg MUX_VAL(CP(SYS_BOOT3), (IEN | PTU | DIS | M4)); /*GPIO_5*/
233b09bf723SIgor Grinberg MUX_VAL(CP(SYS_BOOT4), (IEN | PTU | DIS | M4)); /*GPIO_6*/
234b09bf723SIgor Grinberg MUX_VAL(CP(SYS_BOOT5), (IEN | PTU | DIS | M4)); /*GPIO_7*/
235b09bf723SIgor Grinberg }
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