1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Pinmux configuration for Compulab CM-T335 board 4 * 5 * Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/ 6 * 7 * Author: Ilya Ledvich <ilya@compulab.co.il> 8 */ 9 10 #include <common.h> 11 #include <asm/arch/sys_proto.h> 12 #include <asm/arch/hardware.h> 13 #include <asm/arch/mux.h> 14 #include <asm/io.h> 15 16 static struct module_pin_mux uart0_pin_mux[] = { 17 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, 18 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, 19 {-1}, 20 }; 21 22 static struct module_pin_mux uart1_pin_mux[] = { 23 {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, 24 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, 25 {OFFSET(uart1_ctsn), (MODE(0) | PULLUP_EN | RXACTIVE)}, 26 {OFFSET(uart1_rtsn), (MODE(0) | PULLUDEN)}, 27 {-1}, 28 }; 29 30 static struct module_pin_mux mmc0_pin_mux[] = { 31 {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, 32 {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, 33 {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, 34 {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, 35 {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, 36 {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, 37 {-1}, 38 }; 39 40 static struct module_pin_mux i2c0_pin_mux[] = { 41 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDDIS | SLEWCTRL)}, 42 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDDIS | SLEWCTRL)}, 43 {-1}, 44 }; 45 46 static struct module_pin_mux i2c1_pin_mux[] = { 47 /* I2C_DATA */ 48 {OFFSET(uart0_ctsn), (MODE(3) | RXACTIVE | PULLUDDIS | SLEWCTRL)}, 49 /* I2C_SCLK */ 50 {OFFSET(uart0_rtsn), (MODE(3) | RXACTIVE | PULLUDDIS | SLEWCTRL)}, 51 {-1}, 52 }; 53 54 static struct module_pin_mux rgmii1_pin_mux[] = { 55 {OFFSET(mii1_txen), MODE(2)}, /* RGMII1_TCTL */ 56 {OFFSET(mii1_rxdv), MODE(2) | RXACTIVE}, /* RGMII1_RCTL */ 57 {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */ 58 {OFFSET(mii1_txd2), MODE(2)}, /* RGMII1_TD2 */ 59 {OFFSET(mii1_txd1), MODE(2)}, /* RGMII1_TD1 */ 60 {OFFSET(mii1_txd0), MODE(2)}, /* RGMII1_TD0 */ 61 {OFFSET(mii1_txclk), MODE(2)}, /* RGMII1_TCLK */ 62 {OFFSET(mii1_rxclk), MODE(2) | RXACTIVE}, /* RGMII1_RCLK */ 63 {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */ 64 {OFFSET(mii1_rxd2), MODE(2) | RXACTIVE}, /* RGMII1_RD2 */ 65 {OFFSET(mii1_rxd1), MODE(2) | RXACTIVE}, /* RGMII1_RD1 */ 66 {OFFSET(mii1_rxd0), MODE(2) | RXACTIVE}, /* RGMII1_RD0 */ 67 {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */ 68 {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */ 69 {-1}, 70 }; 71 72 static struct module_pin_mux nand_pin_mux[] = { 73 {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */ 74 {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */ 75 {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */ 76 {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */ 77 {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */ 78 {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */ 79 {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */ 80 {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */ 81 {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */ 82 {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)}, /* NAND_WPN */ 83 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ 84 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ 85 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */ 86 {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */ 87 {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */ 88 {-1}, 89 }; 90 91 static struct module_pin_mux eth_phy_rst_pin_mux[] = { 92 {OFFSET(emu0), (MODE(7) | PULLUDDIS)}, /* GPIO3_7 */ 93 {-1}, 94 }; 95 96 static struct module_pin_mux status_led_pin_mux[] = { 97 {OFFSET(gpmc_csn3), (MODE(7) | PULLUDEN)}, /* GPIO2_0 */ 98 {-1}, 99 }; 100 101 void set_uart_mux_conf(void) 102 { 103 configure_module_pin_mux(uart0_pin_mux); 104 configure_module_pin_mux(uart1_pin_mux); 105 } 106 107 void set_mux_conf_regs(void) 108 { 109 configure_module_pin_mux(i2c0_pin_mux); 110 configure_module_pin_mux(i2c1_pin_mux); 111 configure_module_pin_mux(rgmii1_pin_mux); 112 configure_module_pin_mux(eth_phy_rst_pin_mux); 113 configure_module_pin_mux(mmc0_pin_mux); 114 configure_module_pin_mux(nand_pin_mux); 115 configure_module_pin_mux(status_led_pin_mux); 116 } 117