1 /* 2 * Pinmux configuration for Compulab CM-T335 board 3 * 4 * Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/ 5 * 6 * Author: Ilya Ledvich <ilya@compulab.co.il> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #include <common.h> 12 #include <asm/arch/sys_proto.h> 13 #include <asm/arch/hardware.h> 14 #include <asm/arch/mux.h> 15 #include <asm/io.h> 16 17 static struct module_pin_mux uart0_pin_mux[] = { 18 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, 19 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, 20 {-1}, 21 }; 22 23 static struct module_pin_mux uart1_pin_mux[] = { 24 {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, 25 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, 26 {OFFSET(uart1_ctsn), (MODE(0) | PULLUP_EN | RXACTIVE)}, 27 {OFFSET(uart1_rtsn), (MODE(0) | PULLUDEN)}, 28 {-1}, 29 }; 30 31 static struct module_pin_mux mmc0_pin_mux[] = { 32 {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, 33 {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, 34 {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, 35 {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, 36 {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, 37 {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, 38 {-1}, 39 }; 40 41 static struct module_pin_mux i2c0_pin_mux[] = { 42 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDDIS | SLEWCTRL)}, 43 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDDIS | SLEWCTRL)}, 44 {-1}, 45 }; 46 47 static struct module_pin_mux i2c1_pin_mux[] = { 48 /* I2C_DATA */ 49 {OFFSET(uart0_ctsn), (MODE(3) | RXACTIVE | PULLUDDIS | SLEWCTRL)}, 50 /* I2C_SCLK */ 51 {OFFSET(uart0_rtsn), (MODE(3) | RXACTIVE | PULLUDDIS | SLEWCTRL)}, 52 {-1}, 53 }; 54 55 static struct module_pin_mux rgmii1_pin_mux[] = { 56 {OFFSET(mii1_txen), MODE(2)}, /* RGMII1_TCTL */ 57 {OFFSET(mii1_rxdv), MODE(2) | RXACTIVE}, /* RGMII1_RCTL */ 58 {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */ 59 {OFFSET(mii1_txd2), MODE(2)}, /* RGMII1_TD2 */ 60 {OFFSET(mii1_txd1), MODE(2)}, /* RGMII1_TD1 */ 61 {OFFSET(mii1_txd0), MODE(2)}, /* RGMII1_TD0 */ 62 {OFFSET(mii1_txclk), MODE(2)}, /* RGMII1_TCLK */ 63 {OFFSET(mii1_rxclk), MODE(2) | RXACTIVE}, /* RGMII1_RCLK */ 64 {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */ 65 {OFFSET(mii1_rxd2), MODE(2) | RXACTIVE}, /* RGMII1_RD2 */ 66 {OFFSET(mii1_rxd1), MODE(2) | RXACTIVE}, /* RGMII1_RD1 */ 67 {OFFSET(mii1_rxd0), MODE(2) | RXACTIVE}, /* RGMII1_RD0 */ 68 {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */ 69 {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */ 70 {-1}, 71 }; 72 73 static struct module_pin_mux nand_pin_mux[] = { 74 {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */ 75 {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */ 76 {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */ 77 {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */ 78 {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */ 79 {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */ 80 {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */ 81 {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */ 82 {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */ 83 {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)}, /* NAND_WPN */ 84 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ 85 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ 86 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */ 87 {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */ 88 {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */ 89 {-1}, 90 }; 91 92 static struct module_pin_mux eth_phy_rst_pin_mux[] = { 93 {OFFSET(emu0), (MODE(7) | PULLUDDIS)}, /* GPIO3_7 */ 94 {-1}, 95 }; 96 97 static struct module_pin_mux status_led_pin_mux[] = { 98 {OFFSET(gpmc_csn3), (MODE(7) | PULLUDEN)}, /* GPIO2_0 */ 99 {-1}, 100 }; 101 102 void set_uart_mux_conf(void) 103 { 104 configure_module_pin_mux(uart0_pin_mux); 105 configure_module_pin_mux(uart1_pin_mux); 106 } 107 108 void set_mux_conf_regs(void) 109 { 110 configure_module_pin_mux(i2c0_pin_mux); 111 configure_module_pin_mux(i2c1_pin_mux); 112 configure_module_pin_mux(rgmii1_pin_mux); 113 configure_module_pin_mux(eth_phy_rst_pin_mux); 114 configure_module_pin_mux(mmc0_pin_mux); 115 configure_module_pin_mux(nand_pin_mux); 116 configure_module_pin_mux(status_led_pin_mux); 117 } 118