1 /* 2 * Board functions for Compulab CM-T335 board 3 * 4 * Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/ 5 * 6 * Author: Ilya Ledvich <ilya@compulab.co.il> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #include <common.h> 12 #include <environment.h> 13 #include <errno.h> 14 #include <miiphy.h> 15 #include <cpsw.h> 16 17 #include <asm/arch/sys_proto.h> 18 #include <asm/arch/hardware_am33xx.h> 19 #include <asm/io.h> 20 #include <asm/gpio.h> 21 22 #include "../common/eeprom.h" 23 24 DECLARE_GLOBAL_DATA_PTR; 25 26 /* 27 * Basic board specific setup. Pinmux has been handled already. 28 */ 29 int board_init(void) 30 { 31 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; 32 33 gpmc_init(); 34 35 #if defined(CONFIG_LED_STATUS) && defined(CONFIG_LED_STATUS_BOOT_ENABLE) 36 status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_OFF); 37 #endif 38 return 0; 39 } 40 41 #if defined (CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD) 42 static void cpsw_control(int enabled) 43 { 44 /* VTP can be added here */ 45 return; 46 } 47 48 static struct cpsw_slave_data cpsw_slave = { 49 .slave_reg_ofs = 0x208, 50 .sliver_reg_ofs = 0xd80, 51 .phy_addr = 0, 52 .phy_if = PHY_INTERFACE_MODE_RGMII, 53 }; 54 55 static struct cpsw_platform_data cpsw_data = { 56 .mdio_base = CPSW_MDIO_BASE, 57 .cpsw_base = CPSW_BASE, 58 .mdio_div = 0xff, 59 .channels = 8, 60 .cpdma_reg_ofs = 0x800, 61 .slaves = 1, 62 .slave_data = &cpsw_slave, 63 .ale_reg_ofs = 0xd00, 64 .ale_entries = 1024, 65 .host_port_reg_ofs = 0x108, 66 .hw_stats_reg_ofs = 0x900, 67 .bd_ram_ofs = 0x2000, 68 .mac_control = (1 << 5), 69 .control = cpsw_control, 70 .host_port_num = 0, 71 .version = CPSW_CTRL_VERSION_2, 72 }; 73 74 /* PHY reset GPIO */ 75 #define GPIO_PHY_RST GPIO_PIN(3, 7) 76 77 static void board_phy_init(void) 78 { 79 gpio_request(GPIO_PHY_RST, "phy_rst"); 80 gpio_direction_output(GPIO_PHY_RST, 0); 81 mdelay(2); 82 gpio_set_value(GPIO_PHY_RST, 1); 83 mdelay(2); 84 } 85 86 static void get_efuse_mac_addr(uchar *enetaddr) 87 { 88 uint32_t mac_hi, mac_lo; 89 struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; 90 91 mac_lo = readl(&cdev->macid0l); 92 mac_hi = readl(&cdev->macid0h); 93 enetaddr[0] = mac_hi & 0xFF; 94 enetaddr[1] = (mac_hi & 0xFF00) >> 8; 95 enetaddr[2] = (mac_hi & 0xFF0000) >> 16; 96 enetaddr[3] = (mac_hi & 0xFF000000) >> 24; 97 enetaddr[4] = mac_lo & 0xFF; 98 enetaddr[5] = (mac_lo & 0xFF00) >> 8; 99 } 100 101 /* 102 * Routine: handle_mac_address 103 * Description: prepare MAC address for on-board Ethernet. 104 */ 105 static int handle_mac_address(void) 106 { 107 uchar enetaddr[6]; 108 int rv; 109 110 rv = eth_env_get_enetaddr("ethaddr", enetaddr); 111 if (rv) 112 return 0; 113 114 rv = cl_eeprom_read_mac_addr(enetaddr, CONFIG_SYS_I2C_EEPROM_BUS); 115 if (rv) 116 get_efuse_mac_addr(enetaddr); 117 118 if (!is_valid_ethaddr(enetaddr)) 119 return -1; 120 121 return eth_env_set_enetaddr("ethaddr", enetaddr); 122 } 123 124 #define AR8051_PHY_DEBUG_ADDR_REG 0x1d 125 #define AR8051_PHY_DEBUG_DATA_REG 0x1e 126 #define AR8051_DEBUG_RGMII_CLK_DLY_REG 0x5 127 #define AR8051_RGMII_TX_CLK_DLY 0x100 128 129 int board_eth_init(bd_t *bis) 130 { 131 int rv, n = 0; 132 const char *devname; 133 struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; 134 135 rv = handle_mac_address(); 136 if (rv) 137 printf("No MAC address found!\n"); 138 139 writel(RGMII_MODE_ENABLE | RGMII_INT_DELAY, &cdev->miisel); 140 141 board_phy_init(); 142 143 rv = cpsw_register(&cpsw_data); 144 if (rv < 0) 145 printf("Error %d registering CPSW switch\n", rv); 146 else 147 n += rv; 148 149 /* 150 * CPSW RGMII Internal Delay Mode is not supported in all PVT 151 * operating points. So we must set the TX clock delay feature 152 * in the AR8051 PHY. Since we only support a single ethernet 153 * device, we only do this for the first instance. 154 */ 155 devname = miiphy_get_current_dev(); 156 157 miiphy_write(devname, 0x0, AR8051_PHY_DEBUG_ADDR_REG, 158 AR8051_DEBUG_RGMII_CLK_DLY_REG); 159 miiphy_write(devname, 0x0, AR8051_PHY_DEBUG_DATA_REG, 160 AR8051_RGMII_TX_CLK_DLY); 161 return n; 162 } 163 #endif /* CONFIG_DRIVER_TI_CPSW && !CONFIG_SPL_BUILD */ 164