1 /* 2 * (C) Copyright 2000-2003 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 #include <common.h> 25 26 #define PHYS_FLASH_1 CFG_FLASH_BASE 27 #define FLASH_BANK_SIZE 0x200000 28 29 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; 30 31 void flash_print_info (flash_info_t * info) 32 { 33 int i; 34 35 switch (info->flash_id & FLASH_VENDMASK) { 36 case (AMD_MANUFACT & FLASH_VENDMASK): 37 printf ("AMD: "); 38 break; 39 default: 40 printf ("Unknown Vendor "); 41 break; 42 } 43 44 switch (info->flash_id & FLASH_TYPEMASK) { 45 case (AMD_ID_PL160CB & FLASH_TYPEMASK): 46 printf ("AM29PL160CB (16Mbit)\n"); 47 break; 48 default: 49 printf ("Unknown Chip Type\n"); 50 goto Done; 51 break; 52 } 53 54 printf (" Size: %ld MB in %d Sectors\n", 55 info->size >> 20, info->sector_count); 56 57 printf (" Sector Start Addresses:"); 58 for (i = 0; i < info->sector_count; i++) { 59 if ((i % 5) == 0) { 60 printf ("\n "); 61 } 62 printf (" %08lX%s", info->start[i], 63 info->protect[i] ? " (RO)" : " "); 64 } 65 printf ("\n"); 66 67 Done: 68 } 69 70 71 unsigned long flash_init (void) 72 { 73 int i, j; 74 ulong size = 0; 75 76 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { 77 ulong flashbase = 0; 78 79 flash_info[i].flash_id = 80 (AMD_MANUFACT & FLASH_VENDMASK) | 81 (AMD_ID_PL160CB & FLASH_TYPEMASK); 82 flash_info[i].size = FLASH_BANK_SIZE; 83 flash_info[i].sector_count = CFG_MAX_FLASH_SECT; 84 memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT); 85 if (i == 0) 86 flashbase = PHYS_FLASH_1; 87 else 88 panic ("configured to many flash banks!\n"); 89 90 for (j = 0; j < flash_info[i].sector_count; j++) { 91 if (j == 0) { 92 /* 1st is 16 KiB */ 93 flash_info[i].start[j] = flashbase; 94 } 95 if ((j >= 1) && (j <= 2)) { 96 /* 2nd and 3rd are 8 KiB */ 97 flash_info[i].start[j] = 98 flashbase + 0x4000 + 0x2000 * (j - 1); 99 } 100 if (j == 3) { 101 /* 4th is 224 KiB */ 102 flash_info[i].start[j] = flashbase + 0x8000; 103 } 104 if ((j >= 4) && (j <= 10)) { 105 /* rest is 256 KiB */ 106 flash_info[i].start[j] = 107 flashbase + 0x40000 + 0x40000 * (j - 108 4); 109 } 110 } 111 size += flash_info[i].size; 112 } 113 114 flash_protect (FLAG_PROTECT_SET, 115 CFG_FLASH_BASE, 116 CFG_FLASH_BASE + 0x3ffff, &flash_info[0]); 117 118 return size; 119 } 120 121 122 #define CMD_READ_ARRAY 0x00F0 123 #define CMD_UNLOCK1 0x00AA 124 #define CMD_UNLOCK2 0x0055 125 #define CMD_ERASE_SETUP 0x0080 126 #define CMD_ERASE_CONFIRM 0x0030 127 #define CMD_PROGRAM 0x00A0 128 #define CMD_UNLOCK_BYPASS 0x0020 129 130 #define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00000555<<1))) 131 #define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x000002AA<<1))) 132 133 #define BIT_ERASE_DONE 0x0080 134 #define BIT_RDY_MASK 0x0080 135 #define BIT_PROGRAM_ERROR 0x0020 136 #define BIT_TIMEOUT 0x80000000 /* our flag */ 137 138 #define READY 1 139 #define ERR 2 140 #define TMO 4 141 142 143 int flash_erase (flash_info_t * info, int s_first, int s_last) 144 { 145 ulong result; 146 int iflag, cflag, prot, sect; 147 int rc = ERR_OK; 148 int chip1; 149 150 /* first look for protection bits */ 151 152 if (info->flash_id == FLASH_UNKNOWN) 153 return ERR_UNKNOWN_FLASH_TYPE; 154 155 if ((s_first < 0) || (s_first > s_last)) { 156 return ERR_INVAL; 157 } 158 159 if ((info->flash_id & FLASH_VENDMASK) != 160 (AMD_MANUFACT & FLASH_VENDMASK)) { 161 return ERR_UNKNOWN_FLASH_VENDOR; 162 } 163 164 prot = 0; 165 for (sect = s_first; sect <= s_last; ++sect) { 166 if (info->protect[sect]) { 167 prot++; 168 } 169 } 170 if (prot) 171 return ERR_PROTECTED; 172 173 /* 174 * Disable interrupts which might cause a timeout 175 * here. Remember that our exception vectors are 176 * at address 0 in the flash, and we don't want a 177 * (ticker) exception to happen while the flash 178 * chip is in programming mode. 179 */ 180 181 cflag = icache_status (); 182 icache_disable (); 183 iflag = disable_interrupts (); 184 185 printf ("\n"); 186 187 /* Start erase on unprotected sectors */ 188 for (sect = s_first; sect <= s_last && !ctrlc (); sect++) { 189 printf ("Erasing sector %2d ... ", sect); 190 191 /* arm simple, non interrupt dependent timer */ 192 set_timer (0); 193 194 if (info->protect[sect] == 0) { /* not protected */ 195 volatile u16 *addr = 196 (volatile u16 *) (info->start[sect]); 197 198 MEM_FLASH_ADDR1 = CMD_UNLOCK1; 199 MEM_FLASH_ADDR2 = CMD_UNLOCK2; 200 MEM_FLASH_ADDR1 = CMD_ERASE_SETUP; 201 202 MEM_FLASH_ADDR1 = CMD_UNLOCK1; 203 MEM_FLASH_ADDR2 = CMD_UNLOCK2; 204 *addr = CMD_ERASE_CONFIRM; 205 206 /* wait until flash is ready */ 207 chip1 = 0; 208 209 do { 210 result = *addr; 211 212 /* check timeout */ 213 if (get_timer (0) > CFG_FLASH_ERASE_TOUT) { 214 MEM_FLASH_ADDR1 = CMD_READ_ARRAY; 215 chip1 = TMO; 216 break; 217 } 218 219 if (!chip1 220 && (result & 0xFFFF) & BIT_ERASE_DONE) 221 chip1 = READY; 222 223 } while (!chip1); 224 225 MEM_FLASH_ADDR1 = CMD_READ_ARRAY; 226 227 if (chip1 == ERR) { 228 rc = ERR_PROG_ERROR; 229 goto outahere; 230 } 231 if (chip1 == TMO) { 232 rc = ERR_TIMOUT; 233 goto outahere; 234 } 235 236 printf ("ok.\n"); 237 } else { /* it was protected */ 238 239 printf ("protected!\n"); 240 } 241 } 242 243 if (ctrlc ()) 244 printf ("User Interrupt!\n"); 245 246 outahere: 247 /* allow flash to settle - wait 10 ms */ 248 udelay (10000); 249 250 if (iflag) 251 enable_interrupts (); 252 253 if (cflag) 254 icache_enable (); 255 256 return rc; 257 } 258 259 260 volatile static int write_word (flash_info_t * info, ulong dest, ulong data) 261 { 262 volatile u16 *addr = (volatile u16 *) dest; 263 ulong result; 264 int rc = ERR_OK; 265 int cflag, iflag; 266 int chip1; 267 268 /* 269 * Check if Flash is (sufficiently) erased 270 */ 271 result = *addr; 272 if ((result & data) != data) 273 return ERR_NOT_ERASED; 274 275 276 /* 277 * Disable interrupts which might cause a timeout 278 * here. Remember that our exception vectors are 279 * at address 0 in the flash, and we don't want a 280 * (ticker) exception to happen while the flash 281 * chip is in programming mode. 282 */ 283 284 cflag = icache_status (); 285 icache_disable (); 286 iflag = disable_interrupts (); 287 288 MEM_FLASH_ADDR1 = CMD_UNLOCK1; 289 MEM_FLASH_ADDR2 = CMD_UNLOCK2; 290 MEM_FLASH_ADDR1 = CMD_PROGRAM; 291 *addr = data; 292 293 /* arm simple, non interrupt dependent timer */ 294 set_timer (0); 295 296 /* wait until flash is ready */ 297 chip1 = 0; 298 do { 299 result = *addr; 300 301 /* check timeout */ 302 if (get_timer (0) > CFG_FLASH_ERASE_TOUT) { 303 chip1 = ERR | TMO; 304 break; 305 } 306 if (!chip1 && ((result & 0x80) == (data & 0x80))) 307 chip1 = READY; 308 309 } while (!chip1); 310 311 *addr = CMD_READ_ARRAY; 312 313 if (chip1 == ERR || *addr != data) 314 rc = ERR_PROG_ERROR; 315 316 if (iflag) 317 enable_interrupts (); 318 319 if (cflag) 320 icache_enable (); 321 322 return rc; 323 } 324 325 326 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) 327 { 328 ulong wp, data; 329 int rc; 330 331 if (addr & 1) { 332 printf ("unaligned destination not supported\n"); 333 return ERR_ALIGN; 334 } 335 336 #if 0 337 if (cnt & 1) { 338 printf ("odd transfer sizes not supported\n"); 339 return ERR_ALIGN; 340 } 341 #endif 342 343 wp = addr; 344 345 if (addr & 1) { 346 data = (*((volatile u8 *) addr) << 8) | *((volatile u8 *) 347 src); 348 if ((rc = write_word (info, wp - 1, data)) != 0) { 349 return (rc); 350 } 351 src += 1; 352 wp += 1; 353 cnt -= 1; 354 } 355 356 while (cnt >= 2) { 357 data = *((volatile u16 *) src); 358 if ((rc = write_word (info, wp, data)) != 0) { 359 return (rc); 360 } 361 src += 2; 362 wp += 2; 363 cnt -= 2; 364 } 365 366 if (cnt == 1) { 367 data = (*((volatile u8 *) src) << 8) | 368 *((volatile u8 *) (wp + 1)); 369 if ((rc = write_word (info, wp, data)) != 0) { 370 return (rc); 371 } 372 src += 1; 373 wp += 1; 374 cnt -= 1; 375 } 376 377 return ERR_OK; 378 } 379