1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2016 Broadcom Ltd.
4  */
5 #include <common.h>
6 #include <asm/system.h>
7 #include <asm/armv8/mmu.h>
8 
9 static struct mm_region ns2_mem_map[] = {
10 	{
11 		.virt = 0x0UL,
12 		.phys = 0x0UL,
13 		.size = 0x80000000UL,
14 		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
15 			 PTE_BLOCK_NON_SHARE |
16 			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
17 	}, {
18 		.virt = 0x80000000UL,
19 		.phys = 0x80000000UL,
20 		.size = 0xff80000000UL,
21 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
22 			 PTE_BLOCK_INNER_SHARE
23 	}, {
24 		/* List terminator */
25 		0,
26 	}
27 };
28 
29 struct mm_region *mem_map = ns2_mem_map;
30 
31 DECLARE_GLOBAL_DATA_PTR;
32 
33 int board_init(void)
34 {
35 	return 0;
36 }
37 
38 int dram_init(void)
39 {
40 	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
41 				    PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE);
42 	return 0;
43 }
44 
45 int dram_init_banksize(void)
46 {
47 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
48 	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
49 
50 	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_1_SIZE;
51 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
52 
53 	return 0;
54 }
55 
56 void reset_cpu(ulong addr)
57 {
58 	psci_system_reset();
59 }
60